[ELF] Respect output section alignment for AT> (non-null lmaRegion)

When lmaRegion is non-null, respect `sec->alignment`
This rule is analogous to `switchTo(sec)` which advances sh_addr (VMA).

This fixes the p_paddr misalignment issue as reported by
https://android-review.googlesource.com/c/trusty/external/trusted-firmware-a/+/1230058

Note, `sec->alignment` is the maximum of ALIGN and input section alignments. We may overalign LMA than GNU ld.

linkerscript/align-lma.s has a FIXME that demonstrates another bug:
`.bss ... >RAM` should be placed in a different PT_LOAD (GNU ld
behavior) because its lmaRegion (nullptr) is different from the previous
section's lmaRegion (ROM).

Reviewed By: psmith

Differential Revision: https://reviews.llvm.org/D74286
This commit is contained in:
Fangrui Song 2020-02-08 11:07:03 -08:00
parent 60a8a504f1
commit e21b9ca751
2 changed files with 33 additions and 1 deletions

View File

@ -835,7 +835,7 @@ void LinkerScript::assignOffsets(OutputSection *sec) {
ctx->lmaOffset = sec->lmaExpr().getValue() - dot;
if (MemoryRegion *mr = sec->lmaRegion)
ctx->lmaOffset = mr->curPos - dot;
ctx->lmaOffset = alignTo(mr->curPos, sec->alignment) - dot;
// If neither AT nor AT> is specified for an allocatable section, the linker
// will set the LMA such that the difference between VMA and LMA for the

View File

@ -0,0 +1,32 @@
# REQUIRES: x86
# RUN: echo 'ret; .data.rel.ro; .balign 16; .byte 0; .data; .byte 0; .bss; .byte 0' | \
# RUN: llvm-mc -filetype=obj -triple=x86_64 - -o %t.o
# RUN: ld.lld -T %s %t.o -o %t
# RUN: llvm-readelf -S -l %t | FileCheck %s
# CHECK: Name Type Address Off Size ES Flg Lk Inf Al
# CHECK-NEXT: NULL 0000000000000000 000000 000000 00 0 0 0
# CHECK-NEXT: .text PROGBITS 0000000000001000 001000 000001 00 AX 0 0 4
# CHECK-NEXT: .data.rel.ro PROGBITS 0000000000011000 002000 000001 00 WA 0 0 16
# CHECK-NEXT: .data PROGBITS 0000000000011010 002010 000001 00 WA 0 0 16
# CHECK-NEXT: .bss NOBITS 0000000000011040 002011 000001 00 WA 0 0 64
# CHECK: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
# CHECK-NEXT: LOAD 0x001000 0x0000000000001000 0x0000000000001000 0x000001 0x000001 R E 0x1000
# CHECK-NEXT: LOAD 0x002000 0x0000000000011000 0x0000000000001010 0x000001 0x000001 RW 0x1000
## FIXME .data and .bss should be placed in different PT_LOAD segments
## because their LMA regions are different.
# CHECK-NEXT: LOAD 0x002010 0x0000000000011010 0x0000000000001020 0x000001 0x000031 RW 0x1000
MEMORY {
ROM : ORIGIN = 0x1000, LENGTH = 1K
RAM : ORIGIN = 0x11000, LENGTH = 1K
}
SECTIONS {
.text 0x1000 : { *(.text*) } >ROM
## Input section alignment decides output section alignment.
.data.rel.ro 0x11000 : { *(.data.rel.ro) } >RAM AT>ROM
## ALIGN decides output section alignment.
.data . : ALIGN(16) { *(.data*) } >RAM AT>ROM
.bss . : ALIGN(64) { *(.bss*) } >RAM
}