forked from OSchip/llvm-project
[InstCombine] Add splat vector test for asymmetric masked icmp fold
(NFC)
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@ -457,6 +457,23 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1(i32 %x) {
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ret i1 %t5
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}
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define <2 x i1> @masked_icmps_mask_notallzeros_bmask_mixed_1_vector(<2 x i32> %x) {
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; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1_vector(
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[X:%.*]], <i32 12, i32 12>
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; CHECK-NEXT: [[T2:%.*]] = icmp ne <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T3:%.*]] = and <2 x i32> [[X]], <i32 7, i32 7>
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; CHECK-NEXT: [[T4:%.*]] = icmp eq <2 x i32> [[T3]], <i32 1, i32 1>
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i1> [[T2]], [[T4]]
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; CHECK-NEXT: ret <2 x i1> [[T5]]
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;
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%t1 = and <2 x i32> %x, <i32 12, i32 12>
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%t2 = icmp ne <2 x i32> %t1, zeroinitializer
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%t3 = and <2 x i32> %x, <i32 7, i32 7>
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%t4 = icmp eq <2 x i32> %t3, <i32 1, i32 1>
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%t5 = and <2 x i1> %t2, %t4
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ret <2 x i1> %t5
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}
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define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(i32 %x) {
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; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
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