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Machine LICM will check that operands are defined outside of the loop. Also 

check that register isn't 0 before going further.

llvm-svn: 45498
This commit is contained in:
Bill Wendling 2008-01-02 21:10:40 +00:00
parent 54bb810997
commit e1f28e7871
2 changed files with 1 additions and 40 deletions
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34
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -144,37 +144,6 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
return true;
}
/// isDefinedInEntryBlock - Goes through the entry block to see if the given
/// virtual register is indeed defined in the entry block.
///
bool X86InstrInfo::isDefinedInEntryBlock(const MachineBasicBlock &Entry,
unsigned VReg) const {
assert(MRegisterInfo::isVirtualRegister(VReg) &&
"Map only holds virtual registers!");
MachineInstrMap.grow(VReg);
if (MachineInstrMap[VReg]) return true;
MachineBasicBlock::const_iterator I = Entry.begin(), E = Entry.end();
for (; I != E; ++I) {
const MachineInstr &MI = *I;
unsigned NumOps = MI.getNumOperands();
for (unsigned i = 0; i < NumOps; ++i) {
const MachineOperand &MO = MI.getOperand(i);
if(MO.isRegister() && MO.isDef() &&
MRegisterInfo::isVirtualRegister(MO.getReg()) &&
MO.getReg() == VReg) {
MachineInstrMap[VReg] = &MI;
return true;
}
}
}
return false;
}
/// isReallySideEffectFree - If the M_MAY_HAVE_SIDE_EFFECTS flag is set, this
/// method is called to determine if the specific instance of this instruction
/// has side effects. This is useful in cases of instructions, like loads, which
@ -189,8 +158,7 @@ bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const {
// Loads from global addresses which aren't redefined in the function are
// side effect free.
if (MRegisterInfo::isVirtualRegister(Reg) &&
isDefinedInEntryBlock(MI->getParent()->getParent()->front(), Reg) &&
if (Reg != 0 && MRegisterInfo::isVirtualRegister(Reg) &&
MI->getOperand(2).isImmediate() &&
MI->getOperand(3).isRegister() &&
MI->getOperand(4).isGlobalAddress() &&

7
llvm/lib/Target/X86/X86InstrInfo.h
View File

@ -225,13 +225,6 @@ namespace X86II {
class X86InstrInfo : public TargetInstrInfoImpl {
X86TargetMachine &TM;
const X86RegisterInfo RI;
mutable IndexedMap<const MachineInstr*, VirtReg2IndexFunctor> MachineInstrMap;
/// isDefinedInEntryBlock - Goes through the entry block to see if the given
/// virtual register is indeed defined in the entry block.
///
bool isDefinedInEntryBlock(const MachineBasicBlock &Entry,
unsigned VReg) const;
public:
X86InstrInfo(X86TargetMachine &tm);