forked from OSchip/llvm-project
Add option and macro definition for AES instructions. Now produces real
assembly for testcases. llvm-svn: 100253
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@ -431,6 +431,7 @@ def mno_sse4_1 : Flag<"-mno-sse4.1">, Group<m_x86_Features_Group>;
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def mno_sse4_2 : Flag<"-mno-sse4.2">, Group<m_x86_Features_Group>;
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def mno_sse : Flag<"-mno-sse">, Group<m_x86_Features_Group>;
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def mno_ssse3 : Flag<"-mno-ssse3">, Group<m_x86_Features_Group>;
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def mno_aes : Flag<"-mno-aes">, Group<m_x86_Features_Group>;
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def mno_thumb : Flag<"-mno-thumb">, Group<m_Group>;
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def marm : Flag<"-marm">, Alias<mno_thumb>;
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@ -447,6 +448,7 @@ def msse4_1 : Flag<"-msse4.1">, Group<m_x86_Features_Group>;
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def msse4_2 : Flag<"-msse4.2">, Group<m_x86_Features_Group>;
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def msse : Flag<"-msse">, Group<m_x86_Features_Group>;
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def mssse3 : Flag<"-mssse3">, Group<m_x86_Features_Group>;
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def maes : Flag<"-maes">, Group<m_x86_Features_Group>;
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def mthumb : Flag<"-mthumb">, Group<m_Group>;
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def mtune_EQ : Joined<"-mtune=">, Group<m_Group>;
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def multi__module : Flag<"-multi_module">;
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@ -765,9 +765,12 @@ class X86TargetInfo : public TargetInfo {
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NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
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} AMD3DNowLevel;
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bool HasAES;
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public:
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X86TargetInfo(const std::string& triple)
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: TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow) {
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: TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
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HasAES(false) {
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LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
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}
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virtual void getTargetBuiltins(const Builtin::Info *&Records,
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@ -813,6 +816,7 @@ void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
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Features["ssse3"] = false;
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Features["sse41"] = false;
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Features["sse42"] = false;
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Features["aes"] = false;
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// LLVM does not currently recognize this.
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// Features["sse4a"] = false;
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@ -841,8 +845,10 @@ void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
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Features["sse42"] = false;
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} else if (CPU == "atom")
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setFeatureEnabled(Features, "sse3", true);
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else if (CPU == "corei7")
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else if (CPU == "corei7") {
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setFeatureEnabled(Features, "sse4", true);
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setFeatureEnabled(Features, "aes", true);
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}
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else if (CPU == "k6" || CPU == "winchip-c6")
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setFeatureEnabled(Features, "mmx", true);
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else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
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@ -892,6 +898,8 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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Features["3dnowa"] = true;
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else if (Name == "3dnowa")
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Features["3dnow"] = Features["3dnowa"] = true;
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else if (Name == "aes")
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Features["aes"] = true;
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} else {
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if (Name == "mmx")
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Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
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@ -917,6 +925,8 @@ bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
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Features["3dnow"] = Features["3dnowa"] = false;
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else if (Name == "3dnowa")
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Features["3dnowa"] = false;
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else if (Name == "aes")
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Features["aes"] = false;
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}
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return true;
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@ -931,6 +941,11 @@ void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
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if (Features[i][0] == '-')
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continue;
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if (Features[i].substr(1) == "aes") {
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HasAES = true;
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continue;
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}
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assert(Features[i][0] == '+' && "Invalid target feature!");
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X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
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.Case("sse42", SSE42)
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@ -969,6 +984,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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DefineStd(Builder, "i386", Opts);
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}
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if (HasAES)
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Builder.defineMacro("__AES__");
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// Target properties.
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Builder.defineMacro("__LITTLE_ENDIAN__");
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