From e1d2d22d2a1c329d269b13e2d43c97fd5e8838aa Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Tue, 16 Jan 2018 15:39:23 +0000 Subject: [PATCH] [SystemZ] Support vector registers with inline asm Allow using vector register names and the "v" constraint in inline asm to ensure compatibility with GCC. llvm-svn: 322562 --- clang/lib/Basic/Targets/SystemZ.cpp | 22 +++++++++++++++++++--- clang/lib/Basic/Targets/SystemZ.h | 2 ++ 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/clang/lib/Basic/Targets/SystemZ.cpp b/clang/lib/Basic/Targets/SystemZ.cpp index 98f3ae2f72b4..2dc9cdf94f7f 100644 --- a/clang/lib/Basic/Targets/SystemZ.cpp +++ b/clang/lib/Basic/Targets/SystemZ.cpp @@ -30,15 +30,30 @@ const Builtin::Info SystemZTargetInfo::BuiltinInfo[] = { }; const char *const SystemZTargetInfo::GCCRegNames[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", - "r11", "r12", "r13", "r14", "r15", "f0", "f2", "f4", "f6", "f1", "f3", - "f5", "f7", "f8", "f10", "f12", "f14", "f9", "f11", "f13", "f15" + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", + "f0", "f2", "f4", "f6", "f1", "f3", "f5", "f7", + "f8", "f10", "f12", "f14", "f9", "f11", "f13", "f15", + /*ap*/"", "cc", /*fp*/"", /*rp*/"", "a0", "a1", + "v16", "v18", "v20", "v22", "v17", "v19", "v21", "v23", + "v24", "v26", "v28", "v30", "v25", "v27", "v29", "v31" +}; + +const TargetInfo::AddlRegName GCCAddlRegNames[] = { + {{"v0"}, 16}, {{"v2"}, 17}, {{"v4"}, 18}, {{"v6"}, 19}, + {{"v1"}, 20}, {{"v3"}, 21}, {{"v5"}, 22}, {{"v7"}, 23}, + {{"v8"}, 24}, {{"v10"}, 25}, {{"v12"}, 26}, {{"v14"}, 27}, + {{"v9"}, 28}, {{"v11"}, 29}, {{"v13"}, 30}, {{"v15"}, 31} }; ArrayRef SystemZTargetInfo::getGCCRegNames() const { return llvm::makeArrayRef(GCCRegNames); } +ArrayRef SystemZTargetInfo::getGCCAddlRegNames() const { + return llvm::makeArrayRef(GCCAddlRegNames); +} + bool SystemZTargetInfo::validateAsmConstraint( const char *&Name, TargetInfo::ConstraintInfo &Info) const { switch (*Name) { @@ -48,6 +63,7 @@ bool SystemZTargetInfo::validateAsmConstraint( case 'a': // Address register case 'd': // Data register (equivalent to 'r') case 'f': // Floating-point register + case 'v': // Vector register Info.setAllowsRegister(); return true; diff --git a/clang/lib/Basic/Targets/SystemZ.h b/clang/lib/Basic/Targets/SystemZ.h index 3023c1d2ea26..91a41bc426bb 100644 --- a/clang/lib/Basic/Targets/SystemZ.h +++ b/clang/lib/Basic/Targets/SystemZ.h @@ -62,6 +62,8 @@ public: return None; } + ArrayRef getGCCAddlRegNames() const override; + bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &info) const override;