forked from OSchip/llvm-project
isTriviallyReMaterializable checks the
TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. llvm-svn: 83671
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@ -1423,8 +1423,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
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// If the target-specific rules don't identify an instruction as
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// being trivially rematerializable, use some target-independent
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// rules.
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if (!MI->getDesc().isRematerializable() ||
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!tii_->isTriviallyReMaterializable(MI)) {
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if (!tii_->isTriviallyReMaterializable(MI)) {
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if (!EnableAggressiveRemat)
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return false;
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@ -960,8 +960,7 @@ bool MachineInstr::isSafeToMove(const TargetInstrInfo *TII,
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bool MachineInstr::isSafeToReMat(const TargetInstrInfo *TII,
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unsigned DstReg) const {
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bool SawStore = false;
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if (!getDesc().isRematerializable() ||
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!TII->isTriviallyReMaterializable(this) ||
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if (!TII->isTriviallyReMaterializable(this) ||
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!isSafeToMove(TII, SawStore))
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return false;
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for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
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@ -322,7 +322,7 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) {
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// FIXME: For now, only hoist re-materilizable instructions. LICM will
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// increase register pressure. We want to make sure it doesn't increase
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// spilling.
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if (!TID.isRematerializable() || !TII->isTriviallyReMaterializable(&MI))
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if (!TII->isTriviallyReMaterializable(&MI))
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return false;
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// If result(s) of this instruction is used by PHIs, then don't hoist it.
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@ -646,8 +646,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt,
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const TargetInstrDesc &TID = DefMI->getDesc();
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if (!TID.isAsCheapAsAMove())
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return false;
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if (!DefMI->getDesc().isRematerializable() ||
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!tii_->isTriviallyReMaterializable(DefMI))
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if (!tii_->isTriviallyReMaterializable(DefMI))
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return false;
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bool SawStore = false;
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if (!DefMI->isSafeToMove(tii_, SawStore))
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