From e194d890126007bc8e5acb655f007ef76002edb7 Mon Sep 17 00:00:00 2001 From: Jonas Devlieghere Date: Wed, 18 Dec 2019 12:49:46 -0800 Subject: [PATCH] [lldb/MachO] "Fix" intentional out-of-bounds error (NFC) Remove the hack that populates the cpsr register in the gpr struct by writing past the end of the array. This was tripping up ASan. Patch by: Reva Cuthbertson --- .../source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 9 +++++---- .../Process/Utility/RegisterContextDarwin_arm.cpp | 5 +++-- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp b/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp index 57c43de0c945..ef6ad1696c47 100644 --- a/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp +++ b/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp @@ -479,12 +479,13 @@ public: switch (flavor) { case GPRAltRegSet: case GPRRegSet: - for (uint32_t i = 0; i < count; ++i) { + // On ARM, the CPSR register is also included in the count but it is + // not included in gpr.r so loop until (count-1). + for (uint32_t i = 0; i < (count - 1); ++i) { gpr.r[i] = data.GetU32(&offset); } - - // Note that gpr.cpsr is also copied by the above loop; this loop - // technically extends one element past the end of the gpr.r[] array. + // Save cpsr explicitly. + gpr.cpsr = data.GetU32(&offset); SetError(GPRRegSet, Read, 0); offset = next_thread_state; diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp index 94eebabfe2e0..173e66904151 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp +++ b/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp @@ -1140,10 +1140,11 @@ bool RegisterContextDarwin_arm::ReadRegister(const RegisterInfo *reg_info, case gpr_sp: case gpr_lr: case gpr_pc: - case gpr_cpsr: value.SetUInt32(gpr.r[reg - gpr_r0]); break; - + case gpr_cpsr: + value.SetUInt32(gpr.cpsr); + break; case fpu_s0: case fpu_s1: case fpu_s2: