forked from OSchip/llvm-project
[Sema][X86] Consider target attribute into the checks in validateOutputSize and validateInputSize.
The validateOutputSize and validateInputSize need to check whether AVX or AVX512 are enabled. But this can be affected by the target attribute so we need to factor that in. This patch copies some of the code from CodeGen to create an appropriate feature map that we can pass to the function. Probably need some refactoring here to share more code with Codegen. Is there a good place to do that? Also need to support the cpu_specific attribute as well. Differential Revision: https://reviews.llvm.org/D68627
This commit is contained in:
parent
60573ae6fe
commit
e1578fd2b7
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@ -95,6 +95,7 @@ class CXXRecordDecl;
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class DiagnosticsEngine;
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class Expr;
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class FixedPointSemantics;
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class GlobalDecl;
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class MangleContext;
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class MangleNumberingContext;
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class MaterializeTemporaryExpr;
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@ -2820,6 +2821,16 @@ public:
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/// PredefinedExpr to cache evaluated results.
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StringLiteral *getPredefinedStringLiteralFromCache(StringRef Key) const;
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/// Parses the target attributes passed in, and returns only the ones that are
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/// valid feature names.
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TargetAttr::ParsedTargetAttr
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filterFunctionTargetAttrs(const TargetAttr *TD) const;
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void getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap,
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const FunctionDecl *) const;
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void getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap,
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GlobalDecl GD) const;
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//===--------------------------------------------------------------------===//
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// Statistics
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//===--------------------------------------------------------------------===//
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@ -945,12 +945,14 @@ public:
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bool validateInputConstraint(MutableArrayRef<ConstraintInfo> OutputConstraints,
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ConstraintInfo &info) const;
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virtual bool validateOutputSize(StringRef /*Constraint*/,
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virtual bool validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef /*Constraint*/,
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unsigned /*Size*/) const {
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return true;
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}
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virtual bool validateInputSize(StringRef /*Constraint*/,
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virtual bool validateInputSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef /*Constraint*/,
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unsigned /*Size*/) const {
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return true;
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}
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@ -10779,3 +10779,66 @@ QualType ASTContext::getCorrespondingSignedFixedPointType(QualType Ty) const {
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llvm_unreachable("Unexpected unsigned fixed point type");
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}
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}
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TargetAttr::ParsedTargetAttr
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ASTContext::filterFunctionTargetAttrs(const TargetAttr *TD) const {
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assert(TD != nullptr);
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TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse();
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ParsedAttr.Features.erase(
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llvm::remove_if(ParsedAttr.Features,
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[&](const std::string &Feat) {
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return !Target->isValidFeatureName(
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StringRef{Feat}.substr(1));
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}),
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ParsedAttr.Features.end());
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return ParsedAttr;
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}
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void ASTContext::getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap,
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const FunctionDecl *FD) const {
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if (FD)
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getFunctionFeatureMap(FeatureMap, GlobalDecl().getWithDecl(FD));
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else
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Target->initFeatureMap(FeatureMap, getDiagnostics(),
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Target->getTargetOpts().CPU,
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Target->getTargetOpts().Features);
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}
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// Fills in the supplied string map with the set of target features for the
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// passed in function.
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void ASTContext::getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap,
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GlobalDecl GD) const {
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StringRef TargetCPU = Target->getTargetOpts().CPU;
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const FunctionDecl *FD = GD.getDecl()->getAsFunction();
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if (const auto *TD = FD->getAttr<TargetAttr>()) {
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TargetAttr::ParsedTargetAttr ParsedAttr = filterFunctionTargetAttrs(TD);
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// Make a copy of the features as passed on the command line into the
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// beginning of the additional features from the function to override.
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ParsedAttr.Features.insert(
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ParsedAttr.Features.begin(),
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Target->getTargetOpts().FeaturesAsWritten.begin(),
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Target->getTargetOpts().FeaturesAsWritten.end());
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if (ParsedAttr.Architecture != "" &&
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Target->isValidCPUName(ParsedAttr.Architecture))
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TargetCPU = ParsedAttr.Architecture;
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// Now populate the feature map, first with the TargetCPU which is either
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// the default or a new one from the target attribute string. Then we'll use
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// the passed in features (FeaturesAsWritten) along with the new ones from
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// the attribute.
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Target->initFeatureMap(FeatureMap, getDiagnostics(), TargetCPU,
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ParsedAttr.Features);
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} else if (const auto *SD = FD->getAttr<CPUSpecificAttr>()) {
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llvm::SmallVector<StringRef, 32> FeaturesTmp;
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Target->getCPUSpecificCPUDispatchFeatures(
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SD->getCPUName(GD.getMultiVersionIndex())->getName(), FeaturesTmp);
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std::vector<std::string> Features(FeaturesTmp.begin(), FeaturesTmp.end());
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Target->initFeatureMap(FeatureMap, getDiagnostics(), TargetCPU, Features);
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} else {
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Target->initFeatureMap(FeatureMap, getDiagnostics(), TargetCPU,
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Target->getTargetOpts().Features);
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}
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}
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@ -1731,21 +1731,24 @@ bool X86TargetInfo::validateAsmConstraint(
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}
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}
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bool X86TargetInfo::validateOutputSize(StringRef Constraint,
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bool X86TargetInfo::validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint,
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unsigned Size) const {
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// Strip off constraint modifiers.
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while (Constraint[0] == '=' || Constraint[0] == '+' || Constraint[0] == '&')
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Constraint = Constraint.substr(1);
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return validateOperandSize(Constraint, Size);
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return validateOperandSize(FeatureMap, Constraint, Size);
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}
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bool X86TargetInfo::validateInputSize(StringRef Constraint,
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bool X86TargetInfo::validateInputSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint,
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unsigned Size) const {
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return validateOperandSize(Constraint, Size);
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return validateOperandSize(FeatureMap, Constraint, Size);
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}
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bool X86TargetInfo::validateOperandSize(StringRef Constraint,
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bool X86TargetInfo::validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint,
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unsigned Size) const {
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switch (Constraint[0]) {
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default:
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@ -1770,7 +1773,7 @@ bool X86TargetInfo::validateOperandSize(StringRef Constraint,
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case 'z':
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case '0':
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// XMM0
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if (SSELevel >= SSE1)
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if (FeatureMap.lookup("sse"))
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return Size <= 128U;
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return false;
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case 'i':
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@ -1784,10 +1787,10 @@ bool X86TargetInfo::validateOperandSize(StringRef Constraint,
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LLVM_FALLTHROUGH;
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case 'v':
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case 'x':
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if (SSELevel >= AVX512F)
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if (FeatureMap.lookup("avx512f"))
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// 512-bit zmm registers can be used if target supports AVX512F.
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return Size <= 512U;
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else if (SSELevel >= AVX)
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else if (FeatureMap.lookup("avx"))
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// 256-bit ymm registers can be used if target supports AVX.
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return Size <= 256U;
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return Size <= 128U;
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@ -177,9 +177,11 @@ public:
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return false;
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}
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bool validateOutputSize(StringRef Constraint, unsigned Size) const override;
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bool validateOutputSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint, unsigned Size) const override;
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bool validateInputSize(StringRef Constraint, unsigned Size) const override;
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bool validateInputSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint, unsigned Size) const override;
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virtual bool
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checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const override {
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@ -191,8 +193,8 @@ public:
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return true;
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};
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virtual bool validateOperandSize(StringRef Constraint, unsigned Size) const;
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virtual bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint, unsigned Size) const;
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std::string convertConstraint(const char *&Constraint) const override;
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const char *getClobbers() const override {
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@ -368,7 +370,8 @@ public:
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return -1;
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}
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bool validateOperandSize(StringRef Constraint, unsigned Size) const override {
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bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
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StringRef Constraint, unsigned Size) const override {
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switch (Constraint[0]) {
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default:
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break;
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@ -386,7 +389,7 @@ public:
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return Size <= 64;
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}
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return X86TargetInfo::validateOperandSize(Constraint, Size);
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return X86TargetInfo::validateOperandSize(FeatureMap, Constraint, Size);
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}
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void setMaxAtomicWidth() override {
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@ -2224,7 +2224,7 @@ static bool hasRequiredFeatures(const SmallVectorImpl<StringRef> &ReqFeatures,
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// Now build up the set of caller features and verify that all the required
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// features are there.
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llvm::StringMap<bool> CallerFeatureMap;
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CGM.getFunctionFeatureMap(CallerFeatureMap, GlobalDecl().getWithDecl(FD));
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CGM.getContext().getFunctionFeatureMap(CallerFeatureMap, FD);
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// If we have at least one of the features in the feature list return
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// true, otherwise return false.
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@ -2286,11 +2286,13 @@ void CodeGenFunction::checkTargetFeatures(SourceLocation Loc,
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// Get the required features for the callee.
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const TargetAttr *TD = TargetDecl->getAttr<TargetAttr>();
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TargetAttr::ParsedTargetAttr ParsedAttr = CGM.filterFunctionTargetAttrs(TD);
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TargetAttr::ParsedTargetAttr ParsedAttr =
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CGM.getContext().filterFunctionTargetAttrs(TD);
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SmallVector<StringRef, 1> ReqFeatures;
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llvm::StringMap<bool> CalleeFeatureMap;
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CGM.getFunctionFeatureMap(CalleeFeatureMap, TargetDecl);
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CGM.getContext().getFunctionFeatureMap(CalleeFeatureMap,
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GlobalDecl(TargetDecl));
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for (const auto &F : ParsedAttr.Features) {
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if (F[0] == '+' && CalleeFeatureMap.lookup(F.substr(1)))
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@ -1667,7 +1667,7 @@ bool CodeGenModule::GetCPUAndFeaturesAttributes(GlobalDecl GD,
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bool AddedAttr = false;
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if (TD || SD) {
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llvm::StringMap<bool> FeatureMap;
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getFunctionFeatureMap(FeatureMap, GD);
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getContext().getFunctionFeatureMap(FeatureMap, GD);
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// Produce the canonical string for this set of features.
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for (const llvm::StringMap<bool>::value_type &Entry : FeatureMap)
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}
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}
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TargetAttr::ParsedTargetAttr CodeGenModule::filterFunctionTargetAttrs(const TargetAttr *TD) {
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assert(TD != nullptr);
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TargetAttr::ParsedTargetAttr ParsedAttr = TD->parse();
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ParsedAttr.Features.erase(
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llvm::remove_if(ParsedAttr.Features,
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[&](const std::string &Feat) {
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return !Target.isValidFeatureName(
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StringRef{Feat}.substr(1));
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}),
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ParsedAttr.Features.end());
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return ParsedAttr;
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}
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// Fills in the supplied string map with the set of target features for the
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// passed in function.
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void CodeGenModule::getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap,
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GlobalDecl GD) {
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StringRef TargetCPU = Target.getTargetOpts().CPU;
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const FunctionDecl *FD = GD.getDecl()->getAsFunction();
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if (const auto *TD = FD->getAttr<TargetAttr>()) {
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TargetAttr::ParsedTargetAttr ParsedAttr = filterFunctionTargetAttrs(TD);
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// Make a copy of the features as passed on the command line into the
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// beginning of the additional features from the function to override.
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ParsedAttr.Features.insert(ParsedAttr.Features.begin(),
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Target.getTargetOpts().FeaturesAsWritten.begin(),
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Target.getTargetOpts().FeaturesAsWritten.end());
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if (ParsedAttr.Architecture != "" &&
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Target.isValidCPUName(ParsedAttr.Architecture))
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TargetCPU = ParsedAttr.Architecture;
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// Now populate the feature map, first with the TargetCPU which is either
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// the default or a new one from the target attribute string. Then we'll use
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// the passed in features (FeaturesAsWritten) along with the new ones from
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// the attribute.
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Target.initFeatureMap(FeatureMap, getDiags(), TargetCPU,
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ParsedAttr.Features);
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} else if (const auto *SD = FD->getAttr<CPUSpecificAttr>()) {
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llvm::SmallVector<StringRef, 32> FeaturesTmp;
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Target.getCPUSpecificCPUDispatchFeatures(
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SD->getCPUName(GD.getMultiVersionIndex())->getName(), FeaturesTmp);
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std::vector<std::string> Features(FeaturesTmp.begin(), FeaturesTmp.end());
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Target.initFeatureMap(FeatureMap, getDiags(), TargetCPU, Features);
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} else {
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Target.initFeatureMap(FeatureMap, getDiags(), TargetCPU,
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Target.getTargetOpts().Features);
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}
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}
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llvm::SanitizerStatReport &CodeGenModule::getSanStats() {
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if (!SanStats)
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SanStats = std::make_unique<llvm::SanitizerStatReport>(&getModule());
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@ -1150,14 +1150,6 @@ public:
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/// It's up to you to ensure that this is safe.
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void AddDefaultFnAttrs(llvm::Function &F);
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/// Parses the target attributes passed in, and returns only the ones that are
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/// valid feature names.
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TargetAttr::ParsedTargetAttr filterFunctionTargetAttrs(const TargetAttr *TD);
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// Fills in the supplied string map with the set of target features for the
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// passed in function.
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void getFunctionFeatureMap(llvm::StringMap<bool> &FeatureMap, GlobalDecl GD);
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StringRef getMangledName(GlobalDecl GD);
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StringRef getBlockMangledName(GlobalDecl GD, const BlockDecl *BD);
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@ -11,6 +11,7 @@
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//===----------------------------------------------------------------------===//
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#include "clang/AST/ExprCXX.h"
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#include "clang/AST/GlobalDecl.h"
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#include "clang/AST/RecordLayout.h"
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#include "clang/AST/TypeLoc.h"
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#include "clang/Basic/TargetInfo.h"
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@ -255,6 +256,10 @@ StmtResult Sema::ActOnGCCAsmStmt(SourceLocation AsmLoc, bool IsSimple,
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// The parser verifies that there is a string literal here.
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assert(AsmString->isAscii());
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FunctionDecl *FD = dyn_cast<FunctionDecl>(getCurLexicalContext());
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llvm::StringMap<bool> FeatureMap;
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Context.getFunctionFeatureMap(FeatureMap, FD);
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for (unsigned i = 0; i != NumOutputs; i++) {
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StringLiteral *Literal = Constraints[i];
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assert(Literal->isAscii());
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@ -325,8 +330,8 @@ StmtResult Sema::ActOnGCCAsmStmt(SourceLocation AsmLoc, bool IsSimple,
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}
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unsigned Size = Context.getTypeSize(OutputExpr->getType());
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if (!Context.getTargetInfo().validateOutputSize(Literal->getString(),
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Size)) {
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if (!Context.getTargetInfo().validateOutputSize(
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FeatureMap, Literal->getString(), Size)) {
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targetDiag(OutputExpr->getBeginLoc(), diag::err_asm_invalid_output_size)
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<< Info.getConstraintStr();
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return new (Context)
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@ -427,8 +432,8 @@ StmtResult Sema::ActOnGCCAsmStmt(SourceLocation AsmLoc, bool IsSimple,
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return StmtError();
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unsigned Size = Context.getTypeSize(Ty);
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if (!Context.getTargetInfo().validateInputSize(Literal->getString(),
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Size))
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if (!Context.getTargetInfo().validateInputSize(FeatureMap,
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Literal->getString(), Size))
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return StmtResult(
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targetDiag(InputExpr->getBeginLoc(), diag::err_asm_invalid_input_size)
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<< Info.getConstraintStr());
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@ -70,3 +70,35 @@ int func1() {
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__asm__ volatile("foo1 %0" : "=x" (val256)); // expected-error {{invalid output size for constraint '=x'}}
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#endif
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}
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int __attribute__((__target__("sse"))) _func2() {
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__asm__ volatile("foo1 %0" : : "x" (val128)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val128)); // No error.
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#ifdef __AVX__
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__asm__ volatile("foo1 %0" : : "x" (val256)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val256)); // No error.
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#else
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__asm__ volatile("foo1 %0" : : "x" (val256)); // expected-error {{invalid input size for constraint 'x'}}
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__asm__ volatile("foo1 %0" : "=x" (val256)); // expected-error {{invalid output size for constraint '=x'}}
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#endif
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__asm__ volatile("foo1 %0" : : "x" (val512)); // expected-error {{invalid input size for constraint 'x'}}
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__asm__ volatile("foo1 %0" : "=x" (val512)); // expected-error {{invalid output size for constraint '=x'}}
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}
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int __attribute__((__target__("avx"))) _func3() {
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__asm__ volatile("foo1 %0" : : "x" (val128)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val128)); // No error.
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__asm__ volatile("foo1 %0" : : "x" (val256)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val256)); // No error.
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__asm__ volatile("foo1 %0" : : "x" (val512)); // expected-error {{invalid input size for constraint 'x'}}
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__asm__ volatile("foo1 %0" : "=x" (val512)); // expected-error {{invalid output size for constraint '=x'}}
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}
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int __attribute__((__target__("avx512f"))) _func4() {
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__asm__ volatile("foo1 %0" : : "x" (val128)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val128)); // No error.
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__asm__ volatile("foo1 %0" : : "x" (val256)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val256)); // No error.
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__asm__ volatile("foo1 %0" : : "x" (val512)); // No error.
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__asm__ volatile("foo1 %0" : "=x" (val512)); // No error.
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}
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