forked from OSchip/llvm-project
[OPENMP][NVPTX]Run parallel regions with num_threads clauses in SPMD
mode. After the previous patch with the more correct handling of the number of threads in parallel regions, the parallel regions with num_threads clauses can be executed in SPMD mode. llvm-svn: 358445
This commit is contained in:
Alexey Bataev
parent
5ae05d810c
commit
e0eb13135f
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@ -715,12 +715,9 @@ getDataSharingMode(CodeGenModule &CGM) {
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}
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/// Check if the parallel directive has an 'if' clause with non-constant or
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/// false condition. Also, check if the number of threads is strictly specified
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/// and run those directives in non-SPMD mode.
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static bool hasParallelIfNumThreadsClause(ASTContext &Ctx,
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const OMPExecutableDirective &D) {
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if (D.hasClausesOfKind<OMPNumThreadsClause>())
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return true;
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/// false condition.
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static bool hasParallelIfClause(ASTContext &Ctx,
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const OMPExecutableDirective &D) {
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for (const auto *C : D.getClausesOfKind<OMPIfClause>()) {
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OpenMPDirectiveKind NameModifier = C->getNameModifier();
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if (NameModifier != OMPD_parallel && NameModifier != OMPD_unknown)
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@ -747,7 +744,7 @@ static bool hasNestedSPMDDirective(ASTContext &Ctx,
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switch (D.getDirectiveKind()) {
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case OMPD_target:
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if (isOpenMPParallelDirective(DKind) &&
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!hasParallelIfNumThreadsClause(Ctx, *NestedDir))
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!hasParallelIfClause(Ctx, *NestedDir))
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return true;
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if (DKind == OMPD_teams) {
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Body = NestedDir->getInnermostCapturedStmt()->IgnoreContainers(
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@ -759,14 +756,14 @@ static bool hasNestedSPMDDirective(ASTContext &Ctx,
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dyn_cast_or_null<OMPExecutableDirective>(ChildStmt)) {
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DKind = NND->getDirectiveKind();
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if (isOpenMPParallelDirective(DKind) &&
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!hasParallelIfNumThreadsClause(Ctx, *NND))
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!hasParallelIfClause(Ctx, *NND))
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return true;
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}
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}
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return false;
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case OMPD_target_teams:
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return isOpenMPParallelDirective(DKind) &&
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!hasParallelIfNumThreadsClause(Ctx, *NestedDir);
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!hasParallelIfClause(Ctx, *NestedDir);
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case OMPD_target_simd:
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case OMPD_target_parallel:
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case OMPD_target_parallel_for:
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@ -840,7 +837,7 @@ static bool supportsSPMDExecutionMode(ASTContext &Ctx,
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case OMPD_target_parallel_for_simd:
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case OMPD_target_teams_distribute_parallel_for:
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case OMPD_target_teams_distribute_parallel_for_simd:
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return !hasParallelIfNumThreadsClause(Ctx, D);
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return !hasParallelIfClause(Ctx, D);
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case OMPD_target_simd:
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case OMPD_target_teams_distribute:
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case OMPD_target_teams_distribute_simd:
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@ -5,21 +5,20 @@
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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// RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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// Check that the execution mode of all 7 target regions is set to Generic Mode.
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// CHECK-DAG: [[NONSPMD:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds
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// CHECK-DAG: [[UNKNOWN:@.+]] = private unnamed_addr constant %struct.ident_t { i32 0, i32 2, i32 2, i32 0, i8* getelementptr inbounds
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// CHECK-DAG: {{@__omp_offloading_.+l59}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l137}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l214}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l324}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l362}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l380}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l345}}_exec_mode = weak constant i8 1
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// CHECK-DAG: [[MAP_TY:%.+]] = type { [128 x i8] }
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// CHECK-DAG: [[GLOB_TY:%.+]] = type { i32* }
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// CHECK-DAG: {{@__omp_offloading_.+l45}}_exec_mode = weak constant i8 0
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// CHECK-DAG: {{@__omp_offloading_.+l123}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l200}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l310}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l348}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l366}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l331}}_exec_mode = weak constant i8 1
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__thread int id;
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@ -32,29 +31,16 @@ struct TT{
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tx &operator[](int i) { return X; }
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};
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// CHECK: define weak void @__omp_offloading_{{.+}}_{{.+}}targetBar{{.+}}_l59(i32* [[PTR1:%.+]], i32** dereferenceable{{.*}} [[PTR2_REF:%.+]])
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// CHECK: define weak void @__omp_offloading_{{.+}}_{{.+}}targetBar{{.+}}_l45(i32* [[PTR1:%.+]], i32** dereferenceable{{.*}} [[PTR2_REF:%.+]])
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// CHECK: store i32* [[PTR1]], i32** [[PTR1_ADDR:%.+]],
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// CHECK: store i32** [[PTR2_REF]], i32*** [[PTR2_REF_PTR:%.+]],
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// CHECK: [[PTR2_REF:%.+]] = load i32**, i32*** [[PTR2_REF_PTR]],
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// CHECK: call void @__kmpc_kernel_init(
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// CHECK: call void @__kmpc_get_team_static_memory(i16 0, i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([[MAP_TY]], [[MAP_TY]] addrspace(3)* @{{.+}}, i32 0, i32 0, i32 0) to i8*), i{{64|32}} %{{.+}}, i16 %{{.+}}, i8** addrspacecast (i8* addrspace(3)* [[BUF_PTR:@.+]] to i8**))
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// CHECK: [[BUF:%.+]] = load i8*, i8* addrspace(3)* [[BUF_PTR]],
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// CHECK: [[BUF_OFFS:%.+]] = getelementptr inbounds i8, i8* [[BUF]], i{{[0-9]+}} 0
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// CHECK: [[BUF:%.+]] = bitcast i8* [[BUF_OFFS]] to [[GLOB_TY]]*
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// CHECK: [[PTR1:%.+]] = load i32*, i32** [[PTR1_ADDR]],
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// CHECK: [[PTR1_GLOB_REF:%.+]] = getelementptr inbounds [[GLOB_TY]], [[GLOB_TY]]* [[BUF]], i32 0, i32 0
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// CHECK: store i32* [[PTR1]], i32** [[PTR1_GLOB_REF]],
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// CHECK: call void @__kmpc_begin_sharing_variables(i8*** [[ARG_PTRS_REF:%.+]], i{{64|32}} 2)
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// CHECK: [[ARG_PTRS:%.+]] = load i8**, i8*** [[ARG_PTRS_REF]],
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// CHECK: [[ARG_PTR1:%.+]] = getelementptr inbounds i8*, i8** [[ARG_PTRS]], i{{[0-9]+}} 0
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// CHECK: [[BC:%.+]] = bitcast i32** [[PTR1_GLOB_REF]] to i8*
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// CHECK: store i8* [[BC]], i8** [[ARG_PTR1]],
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// CHECK: [[ARG_PTR2:%.+]] = getelementptr inbounds i8*, i8** [[ARG_PTRS]], i{{[0-9]+}} 1
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// CHECK: [[BC:%.+]] = bitcast i32** [[PTR2_REF]] to i8*
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// CHECK: store i8* [[BC]], i8** [[ARG_PTR2]],
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: call void @__kmpc_barrier_simple_spmd(%struct.ident_t* null, i32 0)
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// CHECK: call void @__kmpc_end_sharing_variables()
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// CHECK: call void @__kmpc_spmd_kernel_init(
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// CHECK: call void @__kmpc_data_sharing_init_stack_spmd()
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @{{.+}})
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// CHECK: store i32 [[GTID]], i32* [[THREADID:%.+]],
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// CHECK: call void @{{.+}}(i32* [[THREADID]], i32* %{{.+}}, i32** [[PTR1_ADDR]], i32** [[PTR2_REF]])
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// CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 1)
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void targetBar(int *Ptr1, int *Ptr2) {
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#pragma omp target map(Ptr1[:0], Ptr2)
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#pragma omp parallel num_threads(2)
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@ -70,7 +56,7 @@ int foo(int n) {
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double cn[5][n];
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TT<long long, char> d;
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+foo.+l137}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+foo.+l123}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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@ -101,7 +87,7 @@ int foo(int n) {
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T1:@__omp_offloading_.+foo.+l137]]()
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// CHECK: define {{.*}}void [[T1:@__omp_offloading_.+foo.+l123]]()
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// CHECK-DAG: [[TID:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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// CHECK-DAG: [[NTH:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK-DAG: [[WS:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
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@ -143,7 +129,7 @@ int foo(int n) {
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{
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}
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+foo.+l214}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+foo.+l200}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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@ -174,7 +160,7 @@ int foo(int n) {
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T2:@__omp_offloading_.+foo.+l214]](i[[SZ:32|64]] [[ARG1:%[a-zA-Z_]+]], i[[SZ:32|64]] [[ID:%[a-zA-Z_]+]])
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// CHECK: define {{.*}}void [[T2:@__omp_offloading_.+foo.+l200]](i[[SZ:32|64]] [[ARG1:%[a-zA-Z_]+]], i[[SZ:32|64]] [[ID:%[a-zA-Z_]+]])
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// CHECK: [[AA_ADDR:%.+]] = alloca i[[SZ]],
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// CHECK: store i[[SZ]] [[ARG1]], i[[SZ]]* [[AA_ADDR]],
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// CHECK: [[AA_CADDR:%.+]] = bitcast i[[SZ]]* [[AA_ADDR]] to i16*
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@ -217,7 +203,7 @@ int foo(int n) {
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id = aa;
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}
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+foo.+l324}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+foo.+l310}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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@ -248,7 +234,7 @@ int foo(int n) {
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T3:@__omp_offloading_.+foo.+l324]](i[[SZ]]
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// CHECK: define {{.*}}void [[T3:@__omp_offloading_.+foo.+l310]](i[[SZ]]
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// Create local storage for each capture.
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// CHECK: [[LOCAL_A:%.+]] = alloca i[[SZ]]
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// CHECK: [[LOCAL_B:%.+]] = alloca [10 x float]*
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@ -409,7 +395,7 @@ int baz(int f, double &a) {
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return f;
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}
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+static.+362}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+static.+348}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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@ -440,7 +426,7 @@ int baz(int f, double &a) {
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T4:@__omp_offloading_.+static.+l362]](i[[SZ]]
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// CHECK: define {{.*}}void [[T4:@__omp_offloading_.+static.+l348]](i[[SZ]]
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// Create local storage for each capture.
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// CHECK: [[LOCAL_A:%.+]] = alloca i[[SZ]]
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// CHECK: [[LOCAL_AA:%.+]] = alloca i[[SZ]]
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@ -495,7 +481,7 @@ int baz(int f, double &a) {
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+S1.+l380}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+S1.+l366}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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@ -529,7 +515,7 @@ int baz(int f, double &a) {
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T5:@__omp_offloading_.+S1.+l380]](
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// CHECK: define {{.*}}void [[T5:@__omp_offloading_.+S1.+l366]](
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// Create local storage for each capture.
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// CHECK: [[LOCAL_THIS:%.+]] = alloca [[S1:%struct.*]]*
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// CHECK: [[LOCAL_B:%.+]] = alloca i[[SZ]]
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@ -648,7 +634,7 @@ int baz(int f, double &a) {
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// CHECK: ret i32 [[RES]]
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l345}}_worker()
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l331}}_worker()
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// CHECK-DAG: [[OMP_EXEC_STATUS:%.+]] = alloca i8,
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// CHECK-DAG: [[OMP_WORK_FN:%.+]] = alloca i8*,
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// CHECK: store i8* null, i8** [[OMP_WORK_FN]],
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@ -679,7 +665,7 @@ int baz(int f, double &a) {
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// CHECK: [[EXIT]]
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// CHECK: ret void
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// CHECK: define {{.*}}void [[T6:@__omp_offloading_.+template.+l345]](i[[SZ]]
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// CHECK: define {{.*}}void [[T6:@__omp_offloading_.+template.+l331]](i[[SZ]]
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// Create local storage for each capture.
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// CHECK: [[LOCAL_A:%.+]] = alloca i[[SZ]]
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// CHECK: [[LOCAL_AA:%.+]] = alloca i[[SZ]]
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@ -9,8 +9,8 @@
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#define HEADER
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// Check that the execution mode of all 2 target regions on the gpu is set to non-SPMD Mode.
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// CHECK-DAG: {{@__omp_offloading_.+l21}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l26}}_exec_mode = weak constant i8 1
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// CHECK-DAG: {{@__omp_offloading_.+l21}}_exec_mode = weak constant i8 0
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// CHECK-DAG: {{@__omp_offloading_.+l26}}_exec_mode = weak constant i8 0
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template<typename tx>
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tx ftemplate(int n) {
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@ -46,13 +46,16 @@ int bar(int n){
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// CHECK: store i16* {{%.+}}, i16** [[AA_ADDR]], align
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// CHECK: [[AA:%.+]] = load i16*, i16** [[AA_ADDR]], align
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// CHECK: [[THREAD_LIMIT:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK: call void @__kmpc_kernel_init(i32
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// CHECK: call void @__kmpc_push_num_threads
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// CHECK: call void @__kmpc_kernel_deinit(i16 1)
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// CHECK: call void @__kmpc_spmd_kernel_init(i32 [[THREAD_LIMIT]], i16 1, i16 0)
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// CHECK: call void @__kmpc_data_sharing_init_stack_spmd()
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @{{.+}})
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// CHECK: store i32 [[GTID]], i32* [[THREADID:%.+]],
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// CHECK: call void [[OUTLINED:@.+]](i32* [[THREADID]], i32* %{{.+}}, i16* [[AA]])
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// CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 1)
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// CHECK: ret void
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// CHECK: }
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// CHECK: define internal void @{{.+}}(i32* noalias %{{.+}}, i32* noalias %{{.+}}, i16* {{[^%]*}}[[ARG:%.+]])
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// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i16* {{[^%]*}}[[ARG:%.+]])
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// CHECK: = alloca i32*, align
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// CHECK: = alloca i32*, align
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// CHECK: [[AA_ADDR:%.+]] = alloca i16*, align
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@ -63,11 +66,6 @@ int bar(int n){
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// CHECK: ret void
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// CHECK: }
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// CHECK-LABEL: define {{.*}}void {{@__omp_offloading_.+template.+l26}}(
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// CHECK: [[A_ADDR:%.+]] = alloca i32*, align
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// CHECK: [[AA_ADDR:%.+]] = alloca i16*, align
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@ -79,13 +77,16 @@ int bar(int n){
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// CHECK: [[AA:%.+]] = load i16*, i16** [[AA_ADDR]], align
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// CHECK: [[B:%.+]] = load [10 x i32]*, [10 x i32]** [[B_ADDR]], align
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// CHECK: [[THREAD_LIMIT:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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// CHECK: call void @__kmpc_kernel_init(i32
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// CHECK: call void @__kmpc_push_num_threads
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// CHECK: call void @__kmpc_kernel_deinit(i16 1)
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// CHECK: call void @__kmpc_spmd_kernel_init(i32 [[THREAD_LIMIT]], i16 1, i16 0)
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// CHECK: call void @__kmpc_data_sharing_init_stack_spmd()
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// CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @{{.+}})
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// CHECK: store i32 [[GTID]], i32* [[THREADID:%.+]],
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// CHECK: call void [[OUTLINED:@.+]](i32* [[THREADID]], i32* %{{.+}}, i32* [[A]], i16* [[AA]], [10 x i32]* [[B]])
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// CHECK: call void @__kmpc_spmd_kernel_deinit_v2(i16 1)
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// CHECK: ret void
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// CHECK: }
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||||
|
||||
// CHECK: define internal void @{{.+}}(i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{[^%]*}}[[ARG1:%.+]], i16* {{[^%]*}}[[ARG2:%.+]], [10 x i32]* {{[^%]*}}[[ARG3:%.+]])
|
||||
// CHECK: define internal void [[OUTLINED]](i32* noalias %{{.+}}, i32* noalias %{{.+}}, i32* {{[^%]*}}[[ARG1:%.+]], i16* {{[^%]*}}[[ARG2:%.+]], [10 x i32]* {{[^%]*}}[[ARG3:%.+]])
|
||||
// CHECK: = alloca i32*, align
|
||||
// CHECK: = alloca i32*, align
|
||||
// CHECK: [[A_ADDR:%.+]] = alloca i32*, align
|
||||
|
|
|
|||
Loading…
Reference in New Issue