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[NFC] [DirectX] Prefix for intrinsics should be dx 

`dxil` is an architecture supported by the DirectX backend. These
intrinsics will likely be shared with other DirectX architectures like
`dxbc`. Using a common prefix `dx` will make it more intuitive.

Also the `dx` prefix is already set in the Triple, which causes
intrinsics described here to be unmatchable via the ClangBuiltin
mechanism.
This commit is contained in:
Chris Bieneman 2022-07-06 12:18:09 -05:00
parent ea2182fedd
commit e0b5208650
4 changed files with 18 additions and 18 deletions
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2
llvm/include/llvm/IR/CMakeLists.txt
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@ -8,7 +8,7 @@ tablegen(LLVM IntrinsicsAArch64.h -gen-intrinsic-enums -intrinsic-prefix=aarch64
tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn)
tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm)
tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf)
tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dxil)
tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx)
tablegen(LLVM IntrinsicsHexagon.h -gen-intrinsic-enums -intrinsic-prefix=hexagon)
tablegen(LLVM IntrinsicsMips.h -gen-intrinsic-enums -intrinsic-prefix=mips)
tablegen(LLVM IntrinsicsNVPTX.h -gen-intrinsic-enums -intrinsic-prefix=nvvm)

10
llvm/include/llvm/IR/IntrinsicsDirectX.td
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@ -10,11 +10,11 @@
//
//===----------------------------------------------------------------------===//
let TargetPrefix = "dxil" in {
let TargetPrefix = "dx" in {
def int_dxil_thread_id : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem, IntrWillReturn]>;
def int_dxil_group_id : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem, IntrWillReturn]>;
def int_dxil_thread_id_in_group : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem, IntrWillReturn]>;
def int_dxil_flattened_thread_id_in_group : Intrinsic<[llvm_i32_ty], [], [IntrNoMem, IntrWillReturn]>;
def int_dx_thread_id : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem, IntrWillReturn]>;
def int_dx_group_id : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem, IntrWillReturn]>;
def int_dx_thread_id_in_group : Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem, IntrWillReturn]>;
def int_dx_flattened_thread_id_in_group : Intrinsic<[llvm_i32_ty], [], [IntrNoMem, IntrWillReturn]>;
}

8
llvm/lib/Target/DirectX/DXIL.td
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@ -116,7 +116,7 @@ def ThreadId :dxil_op< "ThreadId", 93, ThreadIdClass, ComputeID, "reads the thr
dxil_param<1, "i32", "opcode", "DXIL opcode">,
dxil_param<2, "i32", "component", "component to read (x,y,z)">
]>,
dxil_map_intrinsic<int_dxil_thread_id>;
dxil_map_intrinsic<int_dx_thread_id>;
def GroupId :dxil_op< "GroupId", 94, GroupIdClass, ComputeID, "reads the group ID (SV_GroupID)", "i32;", "rn",
[
@ -124,7 +124,7 @@ def GroupId :dxil_op< "GroupId", 94, GroupIdClass, ComputeID, "reads the group
dxil_param<1, "i32", "opcode", "DXIL opcode">,
dxil_param<2, "i32", "component", "component to read">
]>,
dxil_map_intrinsic<int_dxil_group_id>;
dxil_map_intrinsic<int_dx_group_id>;
def ThreadIdInGroup :dxil_op< "ThreadIdInGroup", 95, ThreadIdInGroupClass, ComputeID,
"reads the thread ID within the group (SV_GroupThreadID)", "i32;", "rn",
@ -133,7 +133,7 @@ def ThreadIdInGroup :dxil_op< "ThreadIdInGroup", 95, ThreadIdInGroupClass, Comp
dxil_param<1, "i32", "opcode", "DXIL opcode">,
dxil_param<2, "i32", "component", "component to read (x,y,z)">
]>,
dxil_map_intrinsic<int_dxil_thread_id_in_group>;
dxil_map_intrinsic<int_dx_thread_id_in_group>;
def FlattenedThreadIdInGroup :dxil_op< "FlattenedThreadIdInGroup", 96, FlattenedThreadIdInGroupClass, ComputeID,
"provides a flattened index for a given thread within a given group (SV_GroupIndex)", "i32;", "rn",
@ -141,4 +141,4 @@ def FlattenedThreadIdInGroup :dxil_op< "FlattenedThreadIdInGroup", 96, Flattene
dxil_param<0, "i32", "", "result">,
dxil_param<1, "i32", "opcode", "DXIL opcode">
]>,
dxil_map_intrinsic<int_dxil_flattened_thread_id_in_group>;
dxil_map_intrinsic<int_dx_flattened_thread_id_in_group>;

16
llvm/test/CodeGen/DirectX/comput_ids.ll
View File

@ -10,7 +10,7 @@ target triple = "dxil-pc-shadermodel6.7-library"
define i32 @test_thread_id(i32 %a) #0 {
entry:
; CHECK:call i32 @dx.op.threadId.i32(i32 93, i32 %{{.*}})
%0 = call i32 @llvm.dxil.thread.id(i32 %a)
%0 = call i32 @llvm.dx.thread.id(i32 %a)
ret i32 %0
}
@ -19,7 +19,7 @@ entry:
define i32 @test_group_id(i32 %a) #0 {
entry:
; CHECK:call i32 @dx.op.groupId.i32(i32 94, i32 %{{.*}})
%0 = call i32 @llvm.dxil.group.id(i32 %a)
%0 = call i32 @llvm.dx.group.id(i32 %a)
ret i32 %0
}
@ -28,7 +28,7 @@ entry:
define i32 @test_thread_id_in_group(i32 %a) #0 {
entry:
; CHECK:call i32 @dx.op.threadIdInGroup.i32(i32 95, i32 %{{.*}})
%0 = call i32 @llvm.dxil.thread.id.in.group(i32 %a)
%0 = call i32 @llvm.dx.thread.id.in.group(i32 %a)
ret i32 %0
}
@ -37,15 +37,15 @@ entry:
define i32 @test_flattened_thread_id_in_group() #0 {
entry:
; CHECK:call i32 @dx.op.flattenedThreadIdInGroup.i32(i32 96)
%0 = call i32 @llvm.dxil.flattened.thread.id.in.group()
%0 = call i32 @llvm.dx.flattened.thread.id.in.group()
ret i32 %0
}
; Function Attrs: nounwind readnone willreturn
declare i32 @llvm.dxil.thread.id(i32) #1
declare i32 @llvm.dxil.group.id(i32) #1
declare i32 @llvm.dxil.flattened.thread.id.in.group() #1
declare i32 @llvm.dxil.thread.id.in.group(i32) #1
declare i32 @llvm.dx.thread.id(i32) #1
declare i32 @llvm.dx.group.id(i32) #1
declare i32 @llvm.dx.flattened.thread.id.in.group() #1
declare i32 @llvm.dx.thread.id.in.group(i32) #1
attributes #0 = { noinline nounwind }
attributes #1 = { nounwind readnone willreturn }