forked from OSchip/llvm-project
[X86] Fix PR23155 by turning on X86FixupBWInsts by default.
Differential Revision: http://reviews.llvm.org/D18866 llvm-svn: 265830
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@ -68,7 +68,7 @@ using namespace llvm;
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static cl::opt<bool>
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FixupBWInsts("fixup-byte-word-insts",
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cl::desc("Change byte and word instructions to larger sizes"),
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cl::init(false), cl::Hidden);
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cl::init(true), cl::Hidden);
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namespace {
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class FixupBWInstPass : public MachineFunctionPass {
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@ -30,7 +30,7 @@ define i32 @foo(i32 %p, i8 zeroext %x) nounwind {
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define i32 @bar(i32 %p, i16 zeroext %x) nounwind {
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; X32-LABEL: bar:
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; X32: # BB#0:
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; X32-NEXT: movw {{[0-9]+}}(%esp), %ax
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: divw {{[0-9]+}}(%esp)
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; X32-NEXT: andl $1, %eax
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@ -3565,7 +3565,7 @@ define <32 x i16>@test_int_x86_avx512_mask_pbroadcast_w_gpr_512(i16 %x0, <32 x i
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;
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; AVX512F-32-LABEL: test_int_x86_avx512_mask_pbroadcast_w_gpr_512:
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; AVX512F-32: # BB#0:
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; AVX512F-32-NEXT: movw {{[0-9]+}}(%esp), %ax
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; AVX512F-32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; AVX512F-32-NEXT: kmovd {{[0-9]+}}(%esp), %k1
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; AVX512F-32-NEXT: vpbroadcastw %ax, %zmm0 {%k1}
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; AVX512F-32-NEXT: vpbroadcastw %ax, %zmm1 {%k1} {z}
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@ -6,10 +6,10 @@
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; they must not be placed on the same chain after merging.
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; X86-LABEL: {{^}}merge_store_partial_overlap_load:
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; X86-DAG: movw ([[BASEREG:%[a-z]+]]), [[LO2:%[a-z]+]]
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; X86-DAG: movzwl ([[BASEREG:%[a-z]+]]), %e[[LO2:[a-z]+]]
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; X86-DAG: movb 2([[BASEREG]]), [[HI1:%[a-z]+]]
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; X86-NEXT: movw [[LO2]], 1([[BASEREG]])
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; X86-NEXT: movw %[[LO2]], 1([[BASEREG]])
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; X86-NEXT: movb [[HI1]], 3([[BASEREG]])
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; X86-NEXT: retq
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