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R600/SI: Rename SOPP operands to match the encoding fields 

llvm-svn: 213526
This commit is contained in:
Tom Stellard 2014-07-21 14:01:05 +00:00
parent 96008ea849
commit e08fe68bdd
2 changed files with 19 additions and 19 deletions
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4
llvm/lib/Target/R600/SIInstrFormats.td
View File

@ -142,9 +142,9 @@ class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern> : Enc32 <
asm,
pattern > {
bits <16> SIMM16;
bits <16> simm16;
let Inst{15-0} = SIMM16;
let Inst{15-0} = simm16;
let Inst{22-16} = op;
let Inst{31-23} = 0x17f; // encoding

34
llvm/lib/Target/R600/SIInstructions.td
View File

@ -365,56 +365,56 @@ def S_GETREG_REGRD_B32 : SOPK_32 <0x00000014, "S_GETREG_REGRD_B32", []>;
// SOPP Instructions
//===----------------------------------------------------------------------===//
def S_NOP : SOPP <0x00000000, (ins i16imm:$SIMM16), "S_NOP $SIMM16", []>;
def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "S_NOP $simm16", []>;
let isTerminator = 1 in {
def S_ENDPGM : SOPP <0x00000001, (ins), "S_ENDPGM",
[(IL_retflag)]> {
let SIMM16 = 0;
let simm16 = 0;
let isBarrier = 1;
let hasCtrlDep = 1;
}
let isBranch = 1 in {
def S_BRANCH : SOPP <
0x00000002, (ins brtarget:$target), "S_BRANCH $target",
[(br bb:$target)]> {
0x00000002, (ins brtarget:$simm16), "S_BRANCH $simm16",
[(br bb:$simm16)]> {
let isBarrier = 1;
}
let DisableEncoding = "$scc" in {
def S_CBRANCH_SCC0 : SOPP <
0x00000004, (ins brtarget:$target, SCCReg:$scc),
"S_CBRANCH_SCC0 $target", []
0x00000004, (ins brtarget:$simm16, SCCReg:$scc),
"S_CBRANCH_SCC0 $simm16", []
>;
def S_CBRANCH_SCC1 : SOPP <
0x00000005, (ins brtarget:$target, SCCReg:$scc),
"S_CBRANCH_SCC1 $target",
0x00000005, (ins brtarget:$simm16, SCCReg:$scc),
"S_CBRANCH_SCC1 $simm16",
[]
>;
} // End DisableEncoding = "$scc"
def S_CBRANCH_VCCZ : SOPP <
0x00000006, (ins brtarget:$target, VCCReg:$vcc),
"S_CBRANCH_VCCZ $target",
0x00000006, (ins brtarget:$simm16, VCCReg:$vcc),
"S_CBRANCH_VCCZ $simm16",
[]
>;
def S_CBRANCH_VCCNZ : SOPP <
0x00000007, (ins brtarget:$target, VCCReg:$vcc),
"S_CBRANCH_VCCNZ $target",
0x00000007, (ins brtarget:$simm16, VCCReg:$vcc),
"S_CBRANCH_VCCNZ $simm16",
[]
>;
let DisableEncoding = "$exec" in {
def S_CBRANCH_EXECZ : SOPP <
0x00000008, (ins brtarget:$target, EXECReg:$exec),
"S_CBRANCH_EXECZ $target",
0x00000008, (ins brtarget:$simm16, EXECReg:$exec),
"S_CBRANCH_EXECZ $simm16",
[]
>;
def S_CBRANCH_EXECNZ : SOPP <
0x00000009, (ins brtarget:$target, EXECReg:$exec),
"S_CBRANCH_EXECNZ $target",
0x00000009, (ins brtarget:$simm16, EXECReg:$exec),
"S_CBRANCH_EXECNZ $simm16",
[]
>;
} // End DisableEncoding = "$exec"
@ -427,7 +427,7 @@ let hasSideEffects = 1 in {
def S_BARRIER : SOPP <0x0000000a, (ins), "S_BARRIER",
[(int_AMDGPU_barrier_local)]
> {
let SIMM16 = 0;
let simm16 = 0;
let isBarrier = 1;
let hasCtrlDep = 1;
let mayLoad = 1;