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[VectorCombine] add test for multi-use load (PR47558); NFC

This commit is contained in:
Sanjay Patel 2020-09-17 13:21:58 -04:00
parent 50f1d4517a
commit e06914b59b
1 changed files with 32 additions and 0 deletions
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32
llvm/test/Transforms/VectorCombine/X86/load.ll
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@ -466,3 +466,35 @@ define <2 x float> @load_f32_insert_v2f32_asan(float* align 16 dereferenceable(1
%r = insertelement <2 x float> undef, float %s, i32 0
ret <2 x float> %r
}
declare float* @getscaleptr()
define void @PR47558_multiple_use_load(<2 x float>* nocapture nonnull %resultptr, <2 x float>* nocapture nonnull readonly %opptr) {
; CHECK-LABEL: @PR47558_multiple_use_load(
; CHECK-NEXT: [[SCALEPTR:%.*]] = tail call nonnull align 16 dereferenceable(64) float* @getscaleptr()
; CHECK-NEXT: [[OP:%.*]] = load <2 x float>, <2 x float>* [[OPPTR:%.*]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[SCALEPTR]] to <4 x float>*
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 16
; CHECK-NEXT: [[T1:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> undef, <2 x i32> <i32 0, i32 1>
; CHECK-NEXT: [[SCALE:%.*]] = load float, float* [[SCALEPTR]], align 16
; CHECK-NEXT: [[T2:%.*]] = insertelement <2 x float> [[T1]], float [[SCALE]], i32 1
; CHECK-NEXT: [[T3:%.*]] = fmul <2 x float> [[OP]], [[T2]]
; CHECK-NEXT: [[T4:%.*]] = extractelement <2 x float> [[T3]], i32 0
; CHECK-NEXT: [[RESULT0:%.*]] = insertelement <2 x float> undef, float [[T4]], i32 0
; CHECK-NEXT: [[T5:%.*]] = extractelement <2 x float> [[T3]], i32 1
; CHECK-NEXT: [[RESULT1:%.*]] = insertelement <2 x float> [[RESULT0]], float [[T5]], i32 1
; CHECK-NEXT: store <2 x float> [[RESULT1]], <2 x float>* [[RESULTPTR:%.*]], align 8
; CHECK-NEXT: ret void
;
%scaleptr = tail call nonnull align 16 dereferenceable(64) float* @getscaleptr()
%op = load <2 x float>, <2 x float>* %opptr, align 4
%scale = load float, float* %scaleptr, align 16
%t1 = insertelement <2 x float> undef, float %scale, i32 0
%t2 = insertelement <2 x float> %t1, float %scale, i32 1
%t3 = fmul <2 x float> %op, %t2
%t4 = extractelement <2 x float> %t3, i32 0
%result0 = insertelement <2 x float> undef, float %t4, i32 0
%t5 = extractelement <2 x float> %t3, i32 1
%result1 = insertelement <2 x float> %result0, float %t5, i32 1
store <2 x float> %result1, <2 x float>* %resultptr, align 8
ret void
}