forked from OSchip/llvm-project
[fast-isel] Rename isZExt to isSigned. No functional change intended.
llvm-svn: 149714
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e9b60aaf1c
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e023d5d7f3
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@ -161,8 +161,8 @@ class ARMFastISel : public FastISel {
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bool SelectFPExt(const Instruction *I);
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bool SelectFPExt(const Instruction *I);
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bool SelectFPTrunc(const Instruction *I);
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bool SelectFPTrunc(const Instruction *I);
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bool SelectBinaryOp(const Instruction *I, unsigned ISDOpcode);
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bool SelectBinaryOp(const Instruction *I, unsigned ISDOpcode);
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bool SelectIToFP(const Instruction *I, bool isZExt);
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bool SelectIToFP(const Instruction *I, bool isSigned);
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bool SelectFPToI(const Instruction *I, bool isZExt);
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bool SelectFPToI(const Instruction *I, bool isSigned);
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bool SelectDiv(const Instruction *I, bool isSigned);
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bool SelectDiv(const Instruction *I, bool isSigned);
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bool SelectSRem(const Instruction *I);
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bool SelectSRem(const Instruction *I);
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bool SelectCall(const Instruction *I, const char *IntrMemName);
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bool SelectCall(const Instruction *I, const char *IntrMemName);
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@ -1535,7 +1535,7 @@ bool ARMFastISel::SelectFPTrunc(const Instruction *I) {
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return true;
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return true;
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}
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}
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bool ARMFastISel::SelectIToFP(const Instruction *I, bool isZExt) {
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bool ARMFastISel::SelectIToFP(const Instruction *I, bool isSigned) {
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// Make sure we have VFP.
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// Make sure we have VFP.
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if (!Subtarget->hasVFP2()) return false;
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if (!Subtarget->hasVFP2()) return false;
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@ -1555,7 +1555,8 @@ bool ARMFastISel::SelectIToFP(const Instruction *I, bool isZExt) {
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// Handle sign-extension.
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// Handle sign-extension.
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if (SrcVT == MVT::i16 || SrcVT == MVT::i8) {
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if (SrcVT == MVT::i16 || SrcVT == MVT::i8) {
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EVT DestVT = MVT::i32;
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EVT DestVT = MVT::i32;
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unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt);
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unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT,
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/*isZExt*/!isSigned);
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if (ResultReg == 0) return false;
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if (ResultReg == 0) return false;
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SrcReg = ResultReg;
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SrcReg = ResultReg;
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}
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}
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@ -1566,8 +1567,8 @@ bool ARMFastISel::SelectIToFP(const Instruction *I, bool isZExt) {
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if (FP == 0) return false;
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if (FP == 0) return false;
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unsigned Opc;
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unsigned Opc;
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if (Ty->isFloatTy()) Opc = isZExt ? ARM::VUITOS : ARM::VSITOS;
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if (Ty->isFloatTy()) Opc = isSigned ? ARM::VSITOS : ARM::VUITOS;
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else if (Ty->isDoubleTy()) Opc = isZExt ? ARM::VUITOD : ARM::VSITOD;
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else if (Ty->isDoubleTy()) Opc = isSigned ? ARM::VSITOD : ARM::VUITOD;
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else return false;
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else return false;
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT));
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unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT));
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@ -1578,7 +1579,7 @@ bool ARMFastISel::SelectIToFP(const Instruction *I, bool isZExt) {
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return true;
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return true;
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}
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}
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bool ARMFastISel::SelectFPToI(const Instruction *I, bool isZExt) {
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bool ARMFastISel::SelectFPToI(const Instruction *I, bool isSigned) {
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// Make sure we have VFP.
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// Make sure we have VFP.
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if (!Subtarget->hasVFP2()) return false;
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if (!Subtarget->hasVFP2()) return false;
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@ -1592,8 +1593,8 @@ bool ARMFastISel::SelectFPToI(const Instruction *I, bool isZExt) {
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unsigned Opc;
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unsigned Opc;
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Type *OpTy = I->getOperand(0)->getType();
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Type *OpTy = I->getOperand(0)->getType();
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if (OpTy->isFloatTy()) Opc = isZExt ? ARM::VTOUIZS : ARM::VTOSIZS;
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if (OpTy->isFloatTy()) Opc = isSigned ? ARM::VTOSIZS : ARM::VTOUIZS;
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else if (OpTy->isDoubleTy()) Opc = isZExt ? ARM::VTOUIZD : ARM::VTOSIZD;
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else if (OpTy->isDoubleTy()) Opc = isSigned ? ARM::VTOSIZD : ARM::VTOUIZD;
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else return false;
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else return false;
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// f64->s32/u32 or f32->s32/u32 both need an intermediate f32 reg.
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// f64->s32/u32 or f32->s32/u32 both need an intermediate f32 reg.
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@ -2449,13 +2450,13 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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case Instruction::FPTrunc:
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case Instruction::FPTrunc:
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return SelectFPTrunc(I);
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return SelectFPTrunc(I);
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case Instruction::SIToFP:
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case Instruction::SIToFP:
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return SelectIToFP(I, /*isZExt*/ false);
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return SelectIToFP(I, /*isSigned*/ true);
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case Instruction::UIToFP:
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case Instruction::UIToFP:
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return SelectIToFP(I, /*isZExt*/ true);
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return SelectIToFP(I, /*isSigned*/ false);
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case Instruction::FPToSI:
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case Instruction::FPToSI:
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return SelectFPToI(I, /*isZExt*/ false);
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return SelectFPToI(I, /*isSigned*/ true);
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case Instruction::FPToUI:
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case Instruction::FPToUI:
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return SelectFPToI(I, /*isZExt*/ true);
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return SelectFPToI(I, /*isSigned*/ false);
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case Instruction::FAdd:
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case Instruction::FAdd:
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return SelectBinaryOp(I, ISD::FADD);
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return SelectBinaryOp(I, ISD::FADD);
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case Instruction::FSub:
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case Instruction::FSub:
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