forked from OSchip/llvm-project
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary: InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y). This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used. Reviewers: spatel, majnemer, davide Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34184 llvm-svn: 306029
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@ -317,19 +317,44 @@ static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal,
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Value *FalseVal,
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InstCombiner::BuilderTy *Builder) {
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const ICmpInst *IC = dyn_cast<ICmpInst>(SI.getCondition());
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if (!IC || !IC->isEquality() || !SI.getType()->isIntegerTy())
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if (!IC || !SI.getType()->isIntegerTy())
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return nullptr;
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Value *CmpLHS = IC->getOperand(0);
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Value *CmpRHS = IC->getOperand(1);
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if (!match(CmpRHS, m_Zero()))
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return nullptr;
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Value *V;
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unsigned C1Log;
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bool IsEqualZero;
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bool NeedAnd = false;
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if (IC->isEquality()) {
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if (!match(CmpRHS, m_Zero()))
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return nullptr;
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Value *X;
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const APInt *C1;
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if (!match(CmpLHS, m_And(m_Value(X), m_Power2(C1))))
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const APInt *C1;
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if (!match(CmpLHS, m_And(m_Value(), m_Power2(C1))))
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return nullptr;
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V = CmpLHS;
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C1Log = C1->logBase2();
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IsEqualZero = IC->getPredicate() == ICmpInst::ICMP_EQ;
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} else if (IC->getPredicate() == ICmpInst::ICMP_SLT ||
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IC->getPredicate() == ICmpInst::ICMP_SGT) {
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// We also need to recognize (icmp slt (trunc (X)), 0) and
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// (icmp sgt (trunc (X)), -1).
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IsEqualZero = IC->getPredicate() == ICmpInst::ICMP_SGT;
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if ((IsEqualZero && !match(CmpRHS, m_AllOnes())) ||
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(!IsEqualZero && !match(CmpRHS, m_Zero())))
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return nullptr;
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if (!match(CmpLHS, m_OneUse(m_Trunc(m_Value(V)))))
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return nullptr;
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C1Log = CmpLHS->getType()->getScalarSizeInBits() - 1;
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NeedAnd = true;
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} else {
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return nullptr;
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}
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const APInt *C2;
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bool OrOnTrueVal = false;
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@ -340,15 +365,11 @@ static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal,
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if (!OrOnFalseVal && !OrOnTrueVal)
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return nullptr;
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Value *V = CmpLHS;
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Value *Y = OrOnFalseVal ? TrueVal : FalseVal;
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unsigned C1Log = C1->logBase2();
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unsigned C2Log = C2->logBase2();
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ICmpInst::Predicate Pred = IC->getPredicate();
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bool NeedXor = (Pred == ICmpInst::ICMP_NE && OrOnFalseVal) ||
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(Pred == ICmpInst::ICMP_EQ && OrOnTrueVal);
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bool NeedXor = (!IsEqualZero && OrOnFalseVal) || (IsEqualZero && OrOnTrueVal);
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bool NeedShift = C1Log != C2Log;
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bool NeedZExtTrunc = Y->getType()->getIntegerBitWidth() !=
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V->getType()->getIntegerBitWidth();
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@ -359,6 +380,12 @@ static Value *foldSelectICmpAndOr(const SelectInst &SI, Value *TrueVal,
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(IC->hasOneUse() + Or->hasOneUse()))
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return nullptr;
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if (NeedAnd) {
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// Insert the AND instruction on the input to the truncate.
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APInt C1 = APInt::getOneBitSet(V->getType()->getScalarSizeInBits(), C1Log);
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V = Builder->CreateAnd(V, ConstantInt::get(V->getType(), C1));
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}
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if (C2Log > C1Log) {
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V = Builder->CreateZExtOrTrunc(V, Y->getType());
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V = Builder->CreateShl(V, C2Log - C1Log);
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@ -297,11 +297,10 @@ define i32 @test67(i16 %x) {
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define i32 @test68(i32 %x, i32 %y) {
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; CHECK-LABEL: @test68(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[TMP1]], -1
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2
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; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]]
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; CHECK-NEXT: ret i32 [[SELECT]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2
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; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[TMP3]]
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;
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%and = and i32 %x, 128
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%cmp = icmp eq i32 %and, 0
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@ -312,11 +311,11 @@ define i32 @test68(i32 %x, i32 %y) {
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define i32 @test69(i32 %x, i32 %y) {
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; CHECK-LABEL: @test69(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 0
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; CHECK-NEXT: [[OR:%.*]] = or i32 [[Y:%.*]], 2
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; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[OR]]
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; CHECK-NEXT: ret i32 [[SELECT]]
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6
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; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2
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; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP2]], 2
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; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[Y:%.*]]
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; CHECK-NEXT: ret i32 [[TMP4]]
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;
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%and = and i32 %x, 128
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%cmp = icmp ne i32 %and, 0
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