From dff711ed75bd75a3783ff05ff8505ac0faa20c92 Mon Sep 17 00:00:00 2001 From: Sean Callanan Date: Fri, 20 Jul 2012 22:47:19 +0000 Subject: [PATCH] Added a fix to LLVM that corrects PC-relative branch address printing in the x86 disassembler. llvm-svn: 160588 --- lldb/scripts/llvm.amalgamated.diff | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/lldb/scripts/llvm.amalgamated.diff b/lldb/scripts/llvm.amalgamated.diff index 9419364f027b..03c6a7a858bf 100644 --- a/lldb/scripts/llvm.amalgamated.diff +++ b/lldb/scripts/llvm.amalgamated.diff @@ -479,6 +479,32 @@ Index: lib/Target/ARM/Disassembler/ARMDisassembler.cpp return MCDisassembler::Success; } +Index: lib/Target/X86/Disassembler/X86Disassembler.cpp +=================================================================== +--- lib/Target/X86/Disassembler/X86Disassembler.cpp (revision 152265) ++++ lib/Target/X86/Disassembler/X86Disassembler.cpp (working copy) +@@ -322,7 +322,12 @@ + + OperandType type = (OperandType)operand.type; + ++ bool isBranch = false; ++ uint64_t pcrel = 0; + if (type == TYPE_RELv) { ++ isBranch = true; ++ pcrel = insn.startLocation + ++ insn.displacementOffset + insn.displacementSize; + switch (insn.displacementSize) { + default: + break; +@@ -373,8 +378,6 @@ + } + } + +- bool isBranch = false; +- uint64_t pcrel = 0; + switch (type) { + case TYPE_XMM128: + mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4))); Index: lib/Target/X86/Disassembler/X86DisassemblerDecoder.c =================================================================== --- lib/Target/X86/Disassembler/X86DisassemblerDecoder.c (revision 152265)