forked from OSchip/llvm-project
[NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos
llvm-svn: 185332
This commit is contained in:
Justin Holewinski
parent
a2911283e4
commit
dff28d215f
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@ -1997,7 +1997,7 @@ SDNode *NVPTXDAGToDAGISel::SelectLoadParam(SDNode *Node) {
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Ops.push_back(Flag);
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SDNode *Ret =
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CurDAG->getMachineNode(Opc, DL, Node->getVTList(), Ops);
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CurDAG->getMachineNode(Opc, DL, VTs, Ops);
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return Ret;
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}
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@ -2270,8 +2270,9 @@ SDNode *NVPTXDAGToDAGISel::SelectStoreParam(SDNode *N) {
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}
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}
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SDVTList RetVTs = CurDAG->getVTList(MVT::Other, MVT::Glue);
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SDNode *Ret =
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CurDAG->getMachineNode(Opcode, DL, N->getVTList(), Ops);
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CurDAG->getMachineNode(Opcode, DL, RetVTs, Ops);
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MachineSDNode::mmo_iterator MemRefs0 = MF->allocateMemRefsArray(1);
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MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand();
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cast<MachineSDNode>(Ret)->setMemRefs(MemRefs0, MemRefs0 + 1);
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@ -340,158 +340,6 @@ NVPTXTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
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return DAG.getNode(NVPTXISD::Wrapper, dl, getPointerTy(), Op);
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}
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/*
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std::string NVPTXTargetLowering::getPrototype(
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Type *retTy, const ArgListTy &Args,
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const SmallVectorImpl<ISD::OutputArg> &Outs, unsigned retAlignment) const {
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bool isABI = (nvptxSubtarget.getSmVersion() >= 20);
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std::stringstream O;
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O << "prototype_" << uniqueCallSite << " : .callprototype ";
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if (retTy->getTypeID() == Type::VoidTyID)
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O << "()";
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else {
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O << "(";
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if (isABI) {
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if (retTy->isPrimitiveType() || retTy->isIntegerTy()) {
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unsigned size = 0;
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if (const IntegerType *ITy = dyn_cast<IntegerType>(retTy)) {
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size = ITy->getBitWidth();
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if (size < 32)
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size = 32;
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} else {
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assert(retTy->isFloatingPointTy() &&
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"Floating point type expected here");
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size = retTy->getPrimitiveSizeInBits();
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}
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O << ".param .b" << size << " _";
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} else if (isa<PointerType>(retTy))
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O << ".param .b" << getPointerTy().getSizeInBits() << " _";
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else {
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if ((retTy->getTypeID() == Type::StructTyID) ||
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isa<VectorType>(retTy)) {
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SmallVector<EVT, 16> vtparts;
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ComputeValueVTs(*this, retTy, vtparts);
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unsigned totalsz = 0;
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for (unsigned i = 0, e = vtparts.size(); i != e; ++i) {
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unsigned elems = 1;
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EVT elemtype = vtparts[i];
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if (vtparts[i].isVector()) {
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elems = vtparts[i].getVectorNumElements();
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elemtype = vtparts[i].getVectorElementType();
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}
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for (unsigned j = 0, je = elems; j != je; ++j) {
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unsigned sz = elemtype.getSizeInBits();
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if (elemtype.isInteger() && (sz < 8))
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sz = 8;
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totalsz += sz / 8;
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}
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}
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O << ".param .align " << retAlignment << " .b8 _[" << totalsz << "]";
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} else {
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assert(false && "Unknown return type");
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}
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}
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} else {
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SmallVector<EVT, 16> vtparts;
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ComputeValueVTs(*this, retTy, vtparts);
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unsigned idx = 0;
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for (unsigned i = 0, e = vtparts.size(); i != e; ++i) {
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unsigned elems = 1;
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EVT elemtype = vtparts[i];
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if (vtparts[i].isVector()) {
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elems = vtparts[i].getVectorNumElements();
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elemtype = vtparts[i].getVectorElementType();
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}
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for (unsigned j = 0, je = elems; j != je; ++j) {
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unsigned sz = elemtype.getSizeInBits();
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if (elemtype.isInteger() && (sz < 32))
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sz = 32;
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O << ".reg .b" << sz << " _";
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if (j < je - 1)
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O << ", ";
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++idx;
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}
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if (i < e - 1)
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O << ", ";
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}
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}
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O << ") ";
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}
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O << "_ (";
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bool first = true;
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MVT thePointerTy = getPointerTy();
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for (unsigned i = 0, e = Args.size(); i != e; ++i) {
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const Type *Ty = Args[i].Ty;
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if (!first) {
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O << ", ";
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}
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first = false;
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if (Outs[i].Flags.isByVal() == false) {
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unsigned sz = 0;
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if (isa<IntegerType>(Ty)) {
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sz = cast<IntegerType>(Ty)->getBitWidth();
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if (sz < 32)
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sz = 32;
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} else if (isa<PointerType>(Ty))
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sz = thePointerTy.getSizeInBits();
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else
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sz = Ty->getPrimitiveSizeInBits();
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if (isABI)
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O << ".param .b" << sz << " ";
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else
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O << ".reg .b" << sz << " ";
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O << "_";
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continue;
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}
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const PointerType *PTy = dyn_cast<PointerType>(Ty);
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assert(PTy && "Param with byval attribute should be a pointer type");
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Type *ETy = PTy->getElementType();
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if (isABI) {
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unsigned align = Outs[i].Flags.getByValAlign();
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unsigned sz = getDataLayout()->getTypeAllocSize(ETy);
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O << ".param .align " << align << " .b8 ";
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O << "_";
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O << "[" << sz << "]";
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continue;
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} else {
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SmallVector<EVT, 16> vtparts;
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ComputeValueVTs(*this, ETy, vtparts);
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for (unsigned i = 0, e = vtparts.size(); i != e; ++i) {
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unsigned elems = 1;
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EVT elemtype = vtparts[i];
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if (vtparts[i].isVector()) {
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elems = vtparts[i].getVectorNumElements();
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elemtype = vtparts[i].getVectorElementType();
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}
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for (unsigned j = 0, je = elems; j != je; ++j) {
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unsigned sz = elemtype.getSizeInBits();
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if (elemtype.isInteger() && (sz < 32))
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sz = 32;
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O << ".reg .b" << sz << " ";
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O << "_";
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if (j < je - 1)
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O << ", ";
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}
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if (i < e - 1)
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O << ", ";
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}
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continue;
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}
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}
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O << ");";
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return O.str();
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}*/
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std::string
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NVPTXTargetLowering::getPrototype(Type *retTy, const ArgListTy &Args,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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@ -584,7 +432,9 @@ NVPTXTargetLowering::getPrototype(Type *retTy, const ArgListTy &Args,
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OIdx += len - 1;
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continue;
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}
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assert(getValueType(Ty) == Outs[OIdx].VT &&
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// i8 types in IR will be i16 types in SDAG
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assert((getValueType(Ty) == Outs[OIdx].VT ||
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(getValueType(Ty) == MVT::i8 && Outs[OIdx].VT == MVT::i16)) &&
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"type mismatch between callee prototype and arguments");
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// scalar type
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unsigned sz = 0;
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@ -854,6 +704,8 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
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Ops.push_back(StoreVal);
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}
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Ops.push_back(InFlag);
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SDVTList CopyParamVTs = DAG.getVTList(MVT::Other, MVT::Glue);
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Chain = DAG.getMemIntrinsicNode(Opc, dl, CopyParamVTs, &Ops[0],
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Ops.size(), MemVT,
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@ -1733,8 +1585,8 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
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InVals.push_back(Elt);
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}
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Ofst += TD->getTypeAllocSize(VecVT.getTypeForEVT(F->getContext()));
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InsIdx += VecSize;
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}
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InsIdx += VecSize;
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}
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if (NumElts > 0)
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@ -0,0 +1,13 @@
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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define <16 x float> @foo(<16 x float> %a) {
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; Make sure we index into vectors properly
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; CHECK: ld.param.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [foo_param_0];
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; CHECK: ld.param.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [foo_param_0+16];
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; CHECK: ld.param.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [foo_param_0+32];
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; CHECK: ld.param.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [foo_param_0+48];
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ret <16 x float> %a
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}
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