forked from OSchip/llvm-project
[MI] Fix MachineInstr::isInvariantLoad.
Summary: Previously it would say we had an invariant load if any of the memory operands were invariant. But the load should be invariant only if *all* the memory operands are invariant. No testcase because this has proven to be very difficult to tickle in practice. As just one example, ARM's ldrd instruction, which loads 64 bits into two 32-bit regs, is theoretically affected by this. But when it's produced, it loses its memoperands' invariance bits! Reviewers: jfb Subscribers: llvm-commits, aemerson Differential Revision: http://reviews.llvm.org/D22318 llvm-svn: 275331
This commit is contained in:
parent
7d2aecbc76
commit
dfd358f597
|
@ -1585,8 +1585,7 @@ bool MachineInstr::isInvariantLoad(AliasAnalysis *AA) const {
|
|||
E = memoperands_end(); I != E; ++I) {
|
||||
if ((*I)->isVolatile()) return false;
|
||||
if ((*I)->isStore()) return false;
|
||||
if ((*I)->isInvariant()) return true;
|
||||
|
||||
if ((*I)->isInvariant()) continue;
|
||||
|
||||
// A load from a constant PseudoSourceValue is invariant.
|
||||
if (const PseudoSourceValue *PSV = (*I)->getPseudoValue())
|
||||
|
|
Loading…
Reference in New Issue