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Regenerate extract-store.ll tests 

llvm-svn: 306131
This commit is contained in:
Simon Pilgrim 2017-06-23 17:19:44 +00:00
parent 15ab1720c3
commit dfa436079f
1 changed files with 123 additions and 6 deletions
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129
llvm/test/CodeGen/X86/extract-store.ll
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@ -5,10 +5,8 @@
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE41-X64
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=AVX-X32
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX-X64
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking \
; RUN: | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking \
; RUN: | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE-F128
define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind {
; SSE2-X32-LABEL: extract_i8_0:
@ -45,6 +43,12 @@ define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrb $0, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i8_0:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: movd %xmm0, %eax
; SSE-F128-NEXT: movb %al, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <16 x i8> %foo, i32 0
store i8 %vecext, i8* %dst, align 1
ret void
@ -87,6 +91,13 @@ define void @extract_i8_3(i8* nocapture %dst, <16 x i8> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrb $3, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i8_3:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: movd %xmm0, %eax
; SSE-F128-NEXT: shrl $24, %eax
; SSE-F128-NEXT: movb %al, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <16 x i8> %foo, i32 3
store i8 %vecext, i8* %dst, align 1
ret void
@ -127,6 +138,12 @@ define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrb $15, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i8_15:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: pextrw $7, %xmm0, %eax
; SSE-F128-NEXT: movb %ah, (%rdi) # NOREX
; SSE-F128-NEXT: retq
%vecext = extractelement <16 x i8> %foo, i32 15
store i8 %vecext, i8* %dst, align 1
ret void
@ -167,6 +184,12 @@ define void @extract_i16_0(i16* nocapture %dst, <8 x i16> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrw $0, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i16_0:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: movd %xmm0, %eax
; SSE-F128-NEXT: movw %ax, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <8 x i16> %foo, i32 0
store i16 %vecext, i16* %dst, align 1
ret void
@ -207,6 +230,12 @@ define void @extract_i16_7(i16* nocapture %dst, <8 x i16> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrw $7, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i16_7:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: pextrw $7, %xmm0, %eax
; SSE-F128-NEXT: movw %ax, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <8 x i16> %foo, i32 7
store i16 %vecext, i16* %dst, align 1
ret void
@ -274,6 +303,12 @@ define void @extract_i32_3(i32* nocapture %dst, <4 x i32> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrd $3, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i32_3:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE-F128-NEXT: movd %xmm0, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <4 x i32> %foo, i32 3
store i32 %vecext, i32* %dst, align 1
ret void
@ -336,6 +371,12 @@ define void @extract_i64_1(i64* nocapture %dst, <2 x i64> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vpextrq $1, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_i64_1:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE-F128-NEXT: movq %xmm0, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <2 x i64> %foo, i32 1
store i64 %vecext, i64* %dst, align 1
ret void
@ -403,6 +444,12 @@ define void @extract_f32_3(float* nocapture %dst, <4 x float> %foo) nounwind {
; AVX-X64: # BB#0:
; AVX-X64-NEXT: vextractps $3, %xmm0, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_f32_3:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE-F128-NEXT: movss %xmm0, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <4 x float> %foo, i32 3
store float %vecext, float* %dst, align 1
ret void
@ -463,9 +510,44 @@ define void @extract_f64_1(double* nocapture %dst, <2 x double> %foo) nounwind {
}
define void @extract_f128_0(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
; X32-LABEL: extract_f128_0:
; X32: # BB#0:
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl %esi, 12(%edi)
; X32-NEXT: movl %edx, 8(%edi)
; X32-NEXT: movl %ecx, 4(%edi)
; X32-NEXT: movl %eax, (%edi)
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: retl
;
; SSE2-X64-LABEL: extract_f128_0:
; SSE2-X64: # BB#0:
; SSE2-X64-NEXT: movq %rdx, 8(%rdi)
; SSE2-X64-NEXT: movq %rsi, (%rdi)
; SSE2-X64-NEXT: retq
;
; SSE41-X64-LABEL: extract_f128_0:
; SSE41-X64: # BB#0:
; SSE41-X64-NEXT: movq %rdx, 8(%rdi)
; SSE41-X64-NEXT: movq %rsi, (%rdi)
; SSE41-X64-NEXT: retq
;
; AVX-X64-LABEL: extract_f128_0:
; AVX-X64: # BB#0:
; AVX-X64-NEXT: movq %rdx, 8(%rdi)
; AVX-X64-NEXT: movq %rsi, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_f128_0:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: movaps %xmm0, (%rdi)
; SSE-F128-NEXT: movaps %xmm0, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <2 x fp128> %foo, i32 0
store fp128 %vecext, fp128* %dst, align 1
@ -473,9 +555,44 @@ define void @extract_f128_0(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
}
define void @extract_f128_1(fp128* nocapture %dst, <2 x fp128> %foo) nounwind {
; X32-LABEL: extract_f128_1:
; X32: # BB#0:
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
; X32-NEXT: movl %esi, 12(%edi)
; X32-NEXT: movl %edx, 8(%edi)
; X32-NEXT: movl %ecx, 4(%edi)
; X32-NEXT: movl %eax, (%edi)
; X32-NEXT: popl %esi
; X32-NEXT: popl %edi
; X32-NEXT: retl
;
; SSE2-X64-LABEL: extract_f128_1:
; SSE2-X64: # BB#0:
; SSE2-X64-NEXT: movq %r8, 8(%rdi)
; SSE2-X64-NEXT: movq %rcx, (%rdi)
; SSE2-X64-NEXT: retq
;
; SSE41-X64-LABEL: extract_f128_1:
; SSE41-X64: # BB#0:
; SSE41-X64-NEXT: movq %r8, 8(%rdi)
; SSE41-X64-NEXT: movq %rcx, (%rdi)
; SSE41-X64-NEXT: retq
;
; AVX-X64-LABEL: extract_f128_1:
; AVX-X64: # BB#0:
; AVX-X64-NEXT: movq %r8, 8(%rdi)
; AVX-X64-NEXT: movq %rcx, (%rdi)
; AVX-X64-NEXT: retq
;
; SSE-F128-LABEL: extract_f128_1:
; SSE-F128: # BB#0:
; SSE-F128-NEXT: movaps %xmm1, (%rdi)
; SSE-F128-NEXT: movaps %xmm1, (%rdi)
; SSE-F128-NEXT: retq
%vecext = extractelement <2 x fp128> %foo, i32 1
store fp128 %vecext, fp128* %dst, align 1