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Make use of getStore(). 

llvm-svn: 30759
This commit is contained in:
Evan Cheng 2006-10-05 23:01:46 +00:00
parent af309d29b1
commit df9ac47e5e
9 changed files with 134 additions and 164 deletions
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12
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -2738,9 +2738,8 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
SDNode *PrevStore = Chain.Val;
if (PrevStore->getOperand(1) == Value) // Same value multiply stored.
return Chain;
SDOperand NewStore = DAG.getNode(ISD::STORE, MVT::Other,
PrevStore->getOperand(0), Value, Ptr,
SrcValue);
SDOperand NewStore = DAG.getStore(PrevStore->getOperand(0), Value, Ptr,
SrcValue);
CombineTo(N, NewStore); // Nuke this store.
CombineTo(PrevStore, NewStore); // Nuke the previous store.
return SDOperand(N, 0);
@ -2750,8 +2749,7 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
// FIXME: This needs to know that the resultant store does not need a
// higher alignment than the original.
if (0 && Value.getOpcode() == ISD::BIT_CONVERT) {
return DAG.getNode(ISD::STORE, MVT::Other, Chain, Value.getOperand(0),
Ptr, SrcValue);
return DAG.getStore(Chain, Value.getOperand(0), Ptr, SrcValue);
}
if (CombinerAA) {
@ -2768,9 +2766,7 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
// If there is a better chain.
if (Chain != BetterChain) {
// Replace the chain to avoid dependency.
SDOperand ReplStore = DAG.getNode(ISD::STORE, MVT::Other,
BetterChain, Value, Ptr,
SrcValue);
SDOperand ReplStore = DAG.getStore(BetterChain, Value, Ptr, SrcValue);
// Create token to keep both nodes around.
return DAG.getNode(ISD::TokenFactor, MVT::Other, Chain, ReplStore);
}

54
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -928,8 +928,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
MVT::ValueType PtrVT = TLI.getPointerTy();
SDOperand StackPtr = CreateStackTemporary(VT);
// Store the vector.
SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Tmp1, StackPtr, DAG.getSrcValue(NULL));
SDOperand Ch = DAG.getStore(DAG.getEntryNode(),
Tmp1, StackPtr, DAG.getSrcValue(NULL));
// Truncate or zero extend offset to target pointer type.
unsigned CastOpc = (IdxVT > PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
@ -939,8 +939,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
Tmp3 = DAG.getNode(ISD::MUL, IdxVT, Tmp3,DAG.getConstant(EltSize, IdxVT));
SDOperand StackPtr2 = DAG.getNode(ISD::ADD, IdxVT, Tmp3, StackPtr);
// Store the scalar value.
Ch = DAG.getNode(ISD::STORE, MVT::Other, Ch,
Tmp2, StackPtr2, DAG.getSrcValue(NULL));
Ch = DAG.getStore(Ch, Tmp2, StackPtr2, DAG.getSrcValue(NULL));
// Load the updated vector.
Result = DAG.getLoad(VT, Ch, StackPtr, DAG.getSrcValue(NULL));
break;
@ -1615,8 +1614,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
}
Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Tmp3, Tmp2,
Node->getOperand(3));
Result = DAG.getStore(Tmp1, Tmp3, Tmp2, Node->getOperand(3));
break;
}
@ -1696,16 +1694,14 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
std::swap(Lo, Hi);
}
Lo = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Lo, Tmp2,
Node->getOperand(3));
Lo = DAG.getStore(Tmp1, Lo, Tmp2, Node->getOperand(3));
Tmp2 = DAG.getNode(ISD::ADD, Tmp2.getValueType(), Tmp2,
getIntPtrConstant(IncrementSize));
assert(isTypeLegal(Tmp2.getValueType()) &&
"Pointers must be legal!");
// FIXME: This sets the srcvalue of both halves to be the same, which is
// wrong.
Hi = DAG.getNode(ISD::STORE, MVT::Other, Tmp1, Hi, Tmp2,
Node->getOperand(3));
Hi = DAG.getStore(Tmp1, Hi, Tmp2, Node->getOperand(3));
Result = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo, Hi);
break;
}
@ -2398,8 +2394,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
DAG.getConstant(MVT::getSizeInBits(VT)/8,
TLI.getPointerTy()));
// Store the incremented VAList to the legalized pointer
Tmp3 = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), Tmp3, Tmp2,
Node->getOperand(2));
Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, Node->getOperand(2));
// Load the actual argument out of the pointer VAList
Result = DAG.getLoad(VT, Tmp3, VAList, DAG.getSrcValue(0));
Tmp1 = LegalizeOp(Result.getValue(1));
@ -2436,8 +2431,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
// This defaults to loading a pointer from the input and storing it to the
// output, returning the chain.
Tmp4 = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp3, Node->getOperand(3));
Result = DAG.getNode(ISD::STORE, MVT::Other, Tmp4.getValue(1), Tmp4, Tmp2,
Node->getOperand(4));
Result = DAG.getStore(Tmp4.getValue(1), Tmp4, Tmp2, Node->getOperand(4));
break;
}
break;
@ -3225,8 +3219,7 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) {
DAG.getConstant(MVT::getSizeInBits(VT)/8,
TLI.getPointerTy()));
// Store the incremented VAList to the legalized pointer
Tmp3 = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), Tmp3, Tmp2,
Node->getOperand(2));
Tmp3 = DAG.getStore(VAList.getValue(1), Tmp3, Tmp2, Node->getOperand(2));
// Load the actual argument out of the pointer VAList
Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp3, VAList,
DAG.getSrcValue(0), VT);
@ -3368,8 +3361,8 @@ SDOperand SelectionDAGLegalize::ExpandEXTRACT_VECTOR_ELT(SDOperand Op) {
// If the target doesn't support this, store the value to a temporary
// stack slot, then LOAD the scalar element back out.
SDOperand StackPtr = CreateStackTemporary(Vector.getValueType());
SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Vector, StackPtr, DAG.getSrcValue(NULL));
SDOperand Ch = DAG.getStore(DAG.getEntryNode(),
Vector, StackPtr, DAG.getSrcValue(NULL));
// Add the offset to the index.
unsigned EltSize = MVT::getSizeInBits(Op.getValueType())/8;
@ -3512,8 +3505,8 @@ SDOperand SelectionDAGLegalize::ExpandBIT_CONVERT(MVT::ValueType DestVT,
SDOperand FIPtr = CreateStackTemporary(DestVT);
// Emit a store to the stack slot.
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
SrcOp, FIPtr, DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(DAG.getEntryNode(),
SrcOp, FIPtr, DAG.getSrcValue(NULL));
// Result is a load from the stack slot.
return DAG.getLoad(DestVT, Store, FIPtr, DAG.getSrcValue(0));
}
@ -3522,9 +3515,8 @@ SDOperand SelectionDAGLegalize::ExpandSCALAR_TO_VECTOR(SDNode *Node) {
// Create a vector sized/aligned stack slot, store the value to element #0,
// then load the whole vector back out.
SDOperand StackPtr = CreateStackTemporary(Node->getValueType(0));
SDOperand Ch = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Node->getOperand(0), StackPtr,
DAG.getSrcValue(NULL));
SDOperand Ch = DAG.getStore(DAG.getEntryNode(), Node->getOperand(0), StackPtr,
DAG.getSrcValue(NULL));
return DAG.getLoad(Node->getValueType(0), Ch, StackPtr,DAG.getSrcValue(NULL));
}
@ -3673,9 +3665,8 @@ SDOperand SelectionDAGLegalize::ExpandBUILD_VECTOR(SDNode *Node) {
SDOperand Idx = DAG.getConstant(Offset, FIPtr.getValueType());
Idx = DAG.getNode(ISD::ADD, FIPtr.getValueType(), FIPtr, Idx);
Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Node->getOperand(i), Idx,
DAG.getSrcValue(NULL)));
Stores.push_back(DAG.getStore(DAG.getEntryNode(), Node->getOperand(i), Idx,
DAG.getSrcValue(NULL)));
}
SDOperand StoreChain;
@ -4019,13 +4010,12 @@ SDOperand SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned,
Op0Mapped = Op0;
}
// store the lo of the constructed double - based on integer input
SDOperand Store1 = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Op0Mapped, Lo, DAG.getSrcValue(NULL));
SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
Op0Mapped, Lo, DAG.getSrcValue(NULL));
// initial hi portion of constructed double
SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
// store the hi of the constructed double - biased exponent
SDOperand Store2 = DAG.getNode(ISD::STORE, MVT::Other, Store1,
InitialHi, Hi, DAG.getSrcValue(NULL));
SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, DAG.getSrcValue(NULL));
// load the constructed double
SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot,
DAG.getSrcValue(NULL));
@ -4925,8 +4915,8 @@ void SelectionDAGLegalize::SplitVectorOp(SDOperand Op, SDOperand &Lo,
// Lower to a store/load. FIXME: this could be improved probably.
SDOperand Ptr = CreateStackTemporary(Op.getOperand(0).getValueType());
SDOperand St = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Op.getOperand(0), Ptr, DAG.getSrcValue(0));
SDOperand St = DAG.getStore(DAG.getEntryNode(),
Op.getOperand(0), Ptr, DAG.getSrcValue(0));
MVT::ValueType EVT = cast<VTSDNode>(TypeNode)->getVT();
St = DAG.getVecLoad(NumElements, EVT, St, Ptr, DAG.getSrcValue(0));
SplitVectorOp(St, Lo, Hi);

22
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -1393,8 +1393,8 @@ void SelectionDAGLowering::visitStore(StoreInst &I) {
Value *SrcV = I.getOperand(0);
SDOperand Src = getValue(SrcV);
SDOperand Ptr = getValue(I.getOperand(1));
DAG.setRoot(DAG.getNode(ISD::STORE, MVT::Other, getRoot(), Src, Ptr,
DAG.getSrcValue(I.getOperand(1))));
DAG.setRoot(DAG.getStore(getRoot(), Src, Ptr,
DAG.getSrcValue(I.getOperand(1))));
}
/// IntrinsicCannotAccessMemory - Return true if the specified intrinsic cannot
@ -2285,8 +2285,7 @@ void SelectionDAGLowering::visitInlineAsm(CallInst &I) {
// Emit the non-flagged stores from the physregs.
SmallVector<SDOperand, 8> OutChains;
for (unsigned i = 0, e = StoresToEmit.size(); i != e; ++i)
OutChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
StoresToEmit[i].first,
OutChains.push_back(DAG.getStore(Chain, StoresToEmit[i].first,
getValue(StoresToEmit[i].second),
DAG.getSrcValue(StoresToEmit[i].second)));
if (!OutChains.empty())
@ -2863,8 +2862,7 @@ void SelectionDAGLowering::visitMemIntrinsic(CallInst &I, unsigned Op) {
MVT::ValueType VT = MemOps[i];
unsigned VTSize = getSizeInBits(VT) / 8;
SDOperand Value = getMemsetValue(Op2, VT, DAG);
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, getRoot(),
Value,
SDOperand Store = DAG.getStore(getRoot(), Value,
getMemBasePlusOffset(Op1, Offset, DAG, TLI),
DAG.getSrcValue(I.getOperand(1), Offset));
OutChains.push_back(Store);
@ -2910,18 +2908,18 @@ void SelectionDAGLowering::visitMemIntrinsic(CallInst &I, unsigned Op) {
Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
Chain = getRoot();
Store =
DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
getMemBasePlusOffset(Op1, DstOff, DAG, TLI),
DAG.getSrcValue(I.getOperand(1), DstOff));
DAG.getStore(Chain, Value,
getMemBasePlusOffset(Op1, DstOff, DAG, TLI),
DAG.getSrcValue(I.getOperand(1), DstOff));
} else {
Value = DAG.getLoad(VT, getRoot(),
getMemBasePlusOffset(Op2, SrcOff, DAG, TLI),
DAG.getSrcValue(I.getOperand(2), SrcOff));
Chain = Value.getValue(1);
Store =
DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
getMemBasePlusOffset(Op1, DstOff, DAG, TLI),
DAG.getSrcValue(I.getOperand(1), DstOff));
DAG.getStore(Chain, Value,
getMemBasePlusOffset(Op1, DstOff, DAG, TLI),
DAG.getSrcValue(I.getOperand(1), DstOff));
}
OutChains.push_back(Store);
SrcOff += VTSize;

11
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -242,8 +242,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
unsigned ArgOffset = Layout.getOffset(i);
SDOperand PtrOff = DAG.getConstant(ArgOffset, StackPtr.getValueType());
PtrOff = DAG.getNode(ISD::ADD, MVT::i32, StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
}
if (!MemOpChains.empty())
Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
@ -390,8 +390,7 @@ static SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG,
// memory location argument.
MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR,
Op.getOperand(1), Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), Op.getOperand(2));
}
static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
@ -467,8 +466,8 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
MF.addLiveIn(REGS[RegNo], VReg);
SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i32);
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
Val, FIN, DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
DAG.getSrcValue(NULL));
MemOps.push_back(Store);
}
Root = DAG.getNode(ISD::TokenFactor, MVT::Other,&MemOps[0],MemOps.size());

20
llvm/lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -269,16 +269,14 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
int FI = MFI->CreateFixedObject(8, -8 * (6 - i));
if (i == 0) VarArgsBase = FI;
SDOperand SDFI = DAG.getFrameIndex(FI, MVT::i64);
LS.push_back(DAG.getNode(ISD::STORE, MVT::Other, Root, argt,
SDFI, DAG.getSrcValue(NULL)));
LS.push_back(DAG.getStore(Root, argt, SDFI, DAG.getSrcValue(NULL)));
if (MRegisterInfo::isPhysicalRegister(args_float[i]))
args_float[i] = AddLiveIn(MF, args_float[i], &Alpha::F8RCRegClass);
argt = DAG.getCopyFromReg(Root, args_float[i], MVT::f64);
FI = MFI->CreateFixedObject(8, - 8 * (12 - i));
SDFI = DAG.getFrameIndex(FI, MVT::i64);
LS.push_back(DAG.getNode(ISD::STORE, MVT::Other, Root, argt,
SDFI, DAG.getSrcValue(NULL)));
LS.push_back(DAG.getStore(Root, argt, SDFI, DAG.getSrcValue(NULL)));
}
//Set up a token factor with all the stack traffic
@ -428,8 +426,8 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
int FrameIdx =
DAG.getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i64);
SDOperand ST = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Op.getOperand(0), FI, DAG.getSrcValue(0));
SDOperand ST = DAG.getStore(DAG.getEntryNode(),
Op.getOperand(0), FI, DAG.getSrcValue(0));
LD = DAG.getLoad(MVT::f64, ST, FI, DAG.getSrcValue(0));
}
SDOperand FP = DAG.getNode(isDouble?AlphaISD::CVTQT_:AlphaISD::CVTQS_,
@ -451,8 +449,8 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
int FrameIdx =
DAG.getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
SDOperand FI = DAG.getFrameIndex(FrameIdx, MVT::i64);
SDOperand ST = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
src, FI, DAG.getSrcValue(0));
SDOperand ST = DAG.getStore(DAG.getEntryNode(),
src, FI, DAG.getSrcValue(0));
return DAG.getLoad(MVT::i64, ST, FI, DAG.getSrcValue(0));
}
}
@ -565,8 +563,7 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
SDOperand SrcS = Op.getOperand(4);
SDOperand Val = DAG.getLoad(getPointerTy(), Chain, SrcP, SrcS);
SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), Val,
DestP, DestS);
SDOperand Result = DAG.getStore(Val.getValue(1), Val, DestP, DestS);
SDOperand NP = DAG.getNode(ISD::ADD, MVT::i64, SrcP,
DAG.getConstant(8, MVT::i64));
Val = DAG.getExtLoad(ISD::SEXTLOAD, MVT::i64, Result, NP,
@ -583,8 +580,7 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
// vastart stores the address of the VarArgsBase and VarArgsOffset
SDOperand FR = DAG.getFrameIndex(VarArgsBase, MVT::i64);
SDOperand S1 = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, VAListP,
VAListS);
SDOperand S1 = DAG.getStore(Chain, FR, VAListP, VAListS);
SDOperand SA2 = DAG.getNode(ISD::ADD, MVT::i64, VAListP,
DAG.getConstant(8, MVT::i64));
return DAG.getNode(ISD::TRUNCSTORE, MVT::Other, S1,

11
llvm/lib/Target/IA64/IA64ISelLowering.cpp
View File

@ -387,8 +387,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, MVT::i64, StackPtr, PtrOff);
Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
ValToStore, PtrOff, NullSV));
Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NullSV));
ArgOffset += ObjSize;
}
@ -591,8 +590,8 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
DAG.getConstant(MVT::getSizeInBits(VT)/8,
VT));
// Store the incremented VAList to the legalized pointer
VAIncr = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), VAIncr,
Op.getOperand(1), Op.getOperand(2));
VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
Op.getOperand(1), Op.getOperand(2));
// Load the actual argument out of the pointer VAList
return DAG.getLoad(Op.getValueType(), VAIncr, VAList, DAG.getSrcValue(0));
}
@ -600,8 +599,8 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
// vastart just stores the address of the VarArgsFrameIndex slot into the
// memory location argument.
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR,
Op.getOperand(1), Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), FR,
Op.getOperand(1), Op.getOperand(2));
}
}
}

24
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -743,8 +743,7 @@ static SDOperand LowerVASTART(SDOperand Op, SelectionDAG &DAG,
// memory location argument.
MVT::ValueType PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, PtrVT);
return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR,
Op.getOperand(1), Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), FR, Op.getOperand(1), Op.getOperand(2));
}
static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
@ -900,8 +899,8 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
unsigned VReg = RegMap->createVirtualRegister(&PPC::GPRCRegClass);
MF.addLiveIn(GPR[GPR_idx], VReg);
SDOperand Val = DAG.getCopyFromReg(Root, VReg, PtrVT);
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
Val, FIN, DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
DAG.getSrcValue(NULL));
MemOps.push_back(Store);
// Increment the address by four for the next argument to store
SDOperand PtrOff = DAG.getConstant(MVT::getSizeInBits(PtrVT)/8, PtrVT);
@ -1035,8 +1034,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
if (GPR_idx != NumGPRs) {
RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
} else {
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
}
ArgOffset += PtrByteSize;
break;
@ -1046,9 +1045,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg));
if (isVarArg) {
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff,
DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL));
MemOpChains.push_back(Store);
// Float varargs are always shadowed in available integer registers
@ -1076,8 +1074,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
++GPR_idx;
}
} else {
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
}
if (isPPC64)
ArgOffset += 8;
@ -2123,8 +2121,8 @@ static SDOperand LowerSCALAR_TO_VECTOR(SDOperand Op, SelectionDAG &DAG) {
SDOperand FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
// Store the input value into Value#0 of the stack slot.
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Op.getOperand(0), FIdx,DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(DAG.getEntryNode(),
Op.getOperand(0), FIdx,DAG.getSrcValue(NULL));
// Load it out.
return DAG.getLoad(Op.getValueType(), Store, FIdx, DAG.getSrcValue(NULL));
}

15
llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
View File

@ -437,8 +437,8 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset);
SDOperand FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
OutChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, DAG.getRoot(),
Arg, FIPtr, DAG.getSrcValue(0)));
OutChains.push_back(DAG.getStore(DAG.getRoot(),
Arg, FIPtr, DAG.getSrcValue(0)));
ArgOffset += 4;
}
}
@ -589,8 +589,7 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy,
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, MVT::i32, StackPtr, PtrOff);
Stores.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
ValToStore, PtrOff, NullSV));
Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NullSV));
}
ArgOffset += ObjSize;
}
@ -787,8 +786,8 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32,
DAG.getRegister(SP::I6, MVT::i32),
DAG.getConstant(VarArgsFrameOffset, MVT::i32));
return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), Offset,
Op.getOperand(1), Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), Offset,
Op.getOperand(1), Op.getOperand(2));
}
case ISD::VAARG: {
SDNode *Node = Op.Val;
@ -802,8 +801,8 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
DAG.getConstant(MVT::getSizeInBits(VT)/8,
getPointerTy()));
// Store the incremented VAList to the legalized pointer
InChain = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), NextPtr,
VAListPtr, Node->getOperand(2));
InChain = DAG.getStore(VAList.getValue(1), NextPtr,
VAListPtr, Node->getOperand(2));
// Load the actual argument out of the pointer VAList, unless this is an
// f64 load.
if (VT != MVT::f64) {

129
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -599,8 +599,8 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) {
case MVT::f32: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 4;
break;
}
@ -608,8 +608,8 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) {
case MVT::f64: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 8;
break;
}
@ -627,8 +627,8 @@ SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) {
ArgOffset = ((ArgOffset + 15) / 16) * 16;
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 16;
}
}
@ -991,8 +991,8 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs],
X86::GR64RegisterClass);
SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64);
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
Val, FIN, DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
DAG.getSrcValue(NULL));
MemOps.push_back(Store);
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(8, getPointerTy()));
@ -1005,8 +1005,8 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs],
X86::VR128RegisterClass);
SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32);
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
Val, FIN, DAG.getSrcValue(NULL));
SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN,
DAG.getSrcValue(NULL));
MemOps.push_back(Store);
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(16, getPointerTy()));
@ -1129,8 +1129,8 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
} else {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 8;
}
break;
@ -1152,8 +1152,8 @@ X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) {
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
if (ArgVT == MVT::f32 || ArgVT == MVT::f64)
ArgOffset += 8;
else
@ -1635,16 +1635,16 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
case MVT::f32: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 4;
break;
}
case MVT::f64: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 8;
break;
}
@ -1665,8 +1665,8 @@ SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG,
ArgOffset = ((ArgOffset + 15) / 16) * 16;
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 16;
}
}
@ -1967,8 +1967,8 @@ SDOperand X86TargetLowering::LowerStdCallCCCallTo(SDOperand Op,
case MVT::f32: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 4;
break;
}
@ -1976,8 +1976,8 @@ SDOperand X86TargetLowering::LowerStdCallCCCallTo(SDOperand Op,
case MVT::f64: {
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
Arg, PtrOff, DAG.getSrcValue(NULL)));
MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff,
DAG.getSrcValue(NULL)));
ArgOffset += 8;
break;
}
@ -3994,9 +3994,8 @@ SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
SDOperand Chain = DAG.getNode(ISD::STORE, MVT::Other,
DAG.getEntryNode(), Op.getOperand(0),
StackSlot, DAG.getSrcValue(NULL));
SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0),
StackSlot, DAG.getSrcValue(NULL));
// Build the FILD
std::vector<MVT::ValueType> Tys;
@ -4058,8 +4057,7 @@ SDOperand X86TargetLowering::LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) {
SDOperand Value = Op.getOperand(0);
if (X86ScalarSSE) {
assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!");
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value, StackSlot,
DAG.getSrcValue(0));
Chain = DAG.getStore(Chain, Value, StackSlot, DAG.getSrcValue(0));
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
Tys.push_back(MVT::Other);
@ -4376,8 +4374,8 @@ SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) {
MachineFunction &MF = DAG.getMachineFunction();
int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size);
MemLoc = DAG.getFrameIndex(SSFI, getPointerTy());
Chain = DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0),
Value, MemLoc, DAG.getSrcValue(0));
Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc,
DAG.getSrcValue(0));
}
std::vector<MVT::ValueType> Tys;
Tys.push_back(MVT::f64);
@ -4577,28 +4575,28 @@ SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) {
Val = (Val << 8) | Val;
Val = (Val << 16) | Val;
Value = DAG.getConstant(Val, MVT::i32);
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
DAG.getSrcValue(NULL));
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
DAG.getSrcValue(NULL));
BytesLeft -= 4;
Offset += 4;
}
if (BytesLeft >= 2) {
Value = DAG.getConstant((Val << 8) | Val, MVT::i16);
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
DAG.getSrcValue(NULL));
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
DAG.getSrcValue(NULL));
BytesLeft -= 2;
Offset += 2;
}
if (BytesLeft == 1) {
Value = DAG.getConstant(Val, MVT::i8);
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
DAG.getSrcValue(NULL));
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, AddrVT, DstAddr,
DAG.getConstant(Offset, AddrVT)),
DAG.getSrcValue(NULL));
}
}
@ -4712,10 +4710,10 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
DAG.getConstant(Offset, SrcVT)),
DAG.getSrcValue(NULL));
Chain = Value.getValue(1);
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
DAG.getSrcValue(NULL));
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
DAG.getSrcValue(NULL));
BytesLeft -= 4;
Offset += 4;
}
@ -4725,10 +4723,10 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
DAG.getConstant(Offset, SrcVT)),
DAG.getSrcValue(NULL));
Chain = Value.getValue(1);
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
DAG.getSrcValue(NULL));
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
DAG.getSrcValue(NULL));
BytesLeft -= 2;
Offset += 2;
}
@ -4739,10 +4737,10 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) {
DAG.getConstant(Offset, SrcVT)),
DAG.getSrcValue(NULL));
Chain = Value.getValue(1);
Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
DAG.getSrcValue(NULL));
Chain = DAG.getStore(Chain, Value,
DAG.getNode(ISD::ADD, DstVT, DstAddr,
DAG.getConstant(Offset, DstVT)),
DAG.getSrcValue(NULL));
}
}
@ -4772,8 +4770,7 @@ SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
// vastart just stores the address of the VarArgsFrameIndex slot into the
// memory location argument.
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
return DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0), FR,
Op.getOperand(1), Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1),Op.getOperand(2));
}
// __va_list_tag:
@ -4784,33 +4781,31 @@ SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) {
std::vector<SDOperand> MemOps;
SDOperand FIN = Op.getOperand(1);
// Store gp_offset
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0),
DAG.getConstant(VarArgsGPOffset, MVT::i32),
FIN, Op.getOperand(2));
SDOperand Store = DAG.getStore(Op.getOperand(0),
DAG.getConstant(VarArgsGPOffset, MVT::i32),
FIN, Op.getOperand(2));
MemOps.push_back(Store);
// Store fp_offset
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(4, getPointerTy()));
Store = DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0),
DAG.getConstant(VarArgsFPOffset, MVT::i32),
FIN, Op.getOperand(2));
Store = DAG.getStore(Op.getOperand(0),
DAG.getConstant(VarArgsFPOffset, MVT::i32),
FIN, Op.getOperand(2));
MemOps.push_back(Store);
// Store ptr to overflow_arg_area
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(4, getPointerTy()));
SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy());
Store = DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0),
OVFIN, FIN, Op.getOperand(2));
Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, Op.getOperand(2));
MemOps.push_back(Store);
// Store ptr to reg_save_area.
FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN,
DAG.getConstant(8, getPointerTy()));
SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy());
Store = DAG.getNode(ISD::STORE, MVT::Other, Op.getOperand(0),
RSFIN, FIN, Op.getOperand(2));
Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, Op.getOperand(2));
MemOps.push_back(Store);
return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size());
}