forked from OSchip/llvm-project
Refactor debug statement and remove dead argument. NFC.
llvm-svn: 219626
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679659f58c
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@ -2353,7 +2353,6 @@ bool SelectionDAGBuilder::handleJTSwitchCase(CaseRec &CR,
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bool SelectionDAGBuilder::handleBTSplitSwitchCase(CaseRec& CR,
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bool SelectionDAGBuilder::handleBTSplitSwitchCase(CaseRec& CR,
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CaseRecVector& WorkList,
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CaseRecVector& WorkList,
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const Value* SV,
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const Value* SV,
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MachineBasicBlock* Default,
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MachineBasicBlock* SwitchBB) {
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MachineBasicBlock* SwitchBB) {
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// Get the MachineFunction which holds the current MBB. This is used when
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// Get the MachineFunction which holds the current MBB. This is used when
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// inserting any additional MBBs necessary to represent the switch.
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// inserting any additional MBBs necessary to represent the switch.
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@ -2618,10 +2617,8 @@ bool SelectionDAGBuilder::handleBitTestsSwitchCase(CaseRec& CR,
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}
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}
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/// Clusterify - Transform simple list of Cases into list of CaseRange's
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/// Clusterify - Transform simple list of Cases into list of CaseRange's
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size_t SelectionDAGBuilder::Clusterify(CaseVector& Cases,
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void SelectionDAGBuilder::Clusterify(CaseVector& Cases,
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const SwitchInst& SI) {
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const SwitchInst& SI) {
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size_t numCmps = 0;
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BranchProbabilityInfo *BPI = FuncInfo.BPI;
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BranchProbabilityInfo *BPI = FuncInfo.BPI;
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// Start with "simple" cases
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// Start with "simple" cases
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for (SwitchInst::ConstCaseIt i = SI.case_begin(), e = SI.case_end();
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for (SwitchInst::ConstCaseIt i = SI.case_begin(), e = SI.case_end();
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@ -2659,13 +2656,15 @@ size_t SelectionDAGBuilder::Clusterify(CaseVector& Cases,
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}
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}
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}
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}
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for (CaseItr I=Cases.begin(), E=Cases.end(); I!=E; ++I, ++numCmps) {
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DEBUG({
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if (I->Low != I->High)
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size_t numCmps = 0;
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for (auto &I : Cases)
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// A range counts double, since it requires two compares.
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// A range counts double, since it requires two compares.
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++numCmps;
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numCmps += I.Low != I.High ? 2 : 1;
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}
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return numCmps;
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dbgs() << "Clusterify finished. Total clusters: " << Cases.size()
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<< ". Total compares: " << numCmps << '\n';
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});
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}
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}
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void SelectionDAGBuilder::UpdateSplitBlock(MachineBasicBlock *First,
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void SelectionDAGBuilder::UpdateSplitBlock(MachineBasicBlock *First,
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@ -2707,10 +2706,7 @@ void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
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// representing each one, and sort the vector so that we can efficiently
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// representing each one, and sort the vector so that we can efficiently
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// create a binary search tree from them.
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// create a binary search tree from them.
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CaseVector Cases;
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CaseVector Cases;
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size_t numCmps = Clusterify(Cases, SI);
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Clusterify(Cases, SI);
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DEBUG(dbgs() << "Clusterify finished. Total clusters: " << Cases.size()
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<< ". Total compares: " << numCmps << '\n');
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(void)numCmps;
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// Get the Value to be switched on and default basic blocks, which will be
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// Get the Value to be switched on and default basic blocks, which will be
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// inserted into CaseBlock records, representing basic blocks in the binary
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// inserted into CaseBlock records, representing basic blocks in the binary
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@ -2744,7 +2740,7 @@ void SelectionDAGBuilder::visitSwitch(const SwitchInst &SI) {
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// Emit binary tree. We need to pick a pivot, and push left and right ranges
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// Emit binary tree. We need to pick a pivot, and push left and right ranges
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// onto the worklist. Leafs are handled via handleSmallSwitchRange() call.
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// onto the worklist. Leafs are handled via handleSmallSwitchRange() call.
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handleBTSplitSwitchCase(CR, WorkList, SV, Default, SwitchMBB);
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handleBTSplitSwitchCase(CR, WorkList, SV, SwitchMBB);
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}
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}
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}
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}
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@ -200,7 +200,7 @@ private:
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}
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}
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};
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};
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size_t Clusterify(CaseVector &Cases, const SwitchInst &SI);
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void Clusterify(CaseVector &Cases, const SwitchInst &SI);
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/// CaseBlock - This structure is used to communicate between
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/// CaseBlock - This structure is used to communicate between
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/// SelectionDAGBuilder and SDISel for the code generation of additional basic
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/// SelectionDAGBuilder and SDISel for the code generation of additional basic
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@ -665,7 +665,6 @@ private:
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bool handleBTSplitSwitchCase(CaseRec& CR,
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bool handleBTSplitSwitchCase(CaseRec& CR,
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CaseRecVector& WorkList,
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CaseRecVector& WorkList,
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const Value* SV,
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const Value* SV,
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MachineBasicBlock* Default,
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MachineBasicBlock *SwitchBB);
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MachineBasicBlock *SwitchBB);
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bool handleBitTestsSwitchCase(CaseRec& CR,
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bool handleBitTestsSwitchCase(CaseRec& CR,
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CaseRecVector& WorkList,
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CaseRecVector& WorkList,
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