forked from OSchip/llvm-project
[Hexagon] Add driver options for subtarget features
llvm-svn: 332383
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@ -2562,23 +2562,35 @@ def mv62 : Flag<["-"], "mv62">, Group<m_hexagon_Features_Group>,
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Alias<mcpu_EQ>, AliasArgs<["hexagonv62"]>;
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def mv65 : Flag<["-"], "mv65">, Group<m_hexagon_Features_Group>,
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Alias<mcpu_EQ>, AliasArgs<["hexagonv65"]>;
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def mhexagon_hvx : Flag<[ "-" ], "mhvx">, Group<m_hexagon_Features_HVX_Group>,
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def mhexagon_hvx : Flag<["-"], "mhvx">, Group<m_hexagon_Features_HVX_Group>,
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HelpText<"Enable Hexagon Vector eXtensions">;
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def mhexagon_hvx_EQ : Joined<[ "-" ], "mhvx=">,
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def mhexagon_hvx_EQ : Joined<["-"], "mhvx=">,
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Group<m_hexagon_Features_HVX_Group>,
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HelpText<"Enable Hexagon Vector eXtensions">;
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def mno_hexagon_hvx : Flag<[ "-" ], "mno-hvx">,
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def mno_hexagon_hvx : Flag<["-"], "mno-hvx">,
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Group<m_hexagon_Features_HVX_Group>,
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HelpText<"Disable Hexagon Vector eXtensions">;
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def mhexagon_hvx_length_EQ : Joined<[ "-" ], "mhvx-length=">,
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def mhexagon_hvx_length_EQ : Joined<["-"], "mhvx-length=">,
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Group<m_hexagon_Features_HVX_Group>, HelpText<"Set Hexagon Vector Length">,
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Values<"64B,128B">;
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def ffixed_r19: Flag<["-"], "ffixed-r19">,
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HelpText<"Reserve the r19 register (Hexagon only)">;
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HelpText<"Reserve register r19 (Hexagon only)">;
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def mmemops : Flag<["-"], "mmemops">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Enable generation of memop instructions">;
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def mno_memops : Flag<["-"], "mno-memops">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Disable generation of memop instructions">;
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def mpackets : Flag<["-"], "mpackets">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Enable generation of instruction packets">;
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def mno_packets : Flag<["-"], "mno-packets">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Disable generation of instruction packets">;
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def mnvj : Flag<["-"], "mnvj">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Enable generation of new-value jumps">;
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def mno_nvj : Flag<["-"], "mno-nvj">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Disable generation of new-value jumps">;
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def mnvs : Flag<["-"], "mnvs">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Enable generation of new-value stores">;
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def mno_nvs : Flag<["-"], "mno-nvs">, Group<m_hexagon_Features_Group>,
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Flags<[CC1Option]>, HelpText<"Disable generation of new-value stores">;
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// X86 feature flags
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@ -0,0 +1,10 @@
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// RUN: %clang -target hexagon -### -mmemops %s 2>&1 \
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// RUN: | FileCheck %s -check-prefix CHECK-MEMOPS
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// RUN: %clang -target hexagon -### -mno-memops %s 2>&1 \
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// RUN: | FileCheck %s -check-prefix CHECK-NO-MEMOPS
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// CHECK-MEMOPS: "-target-feature" "+memops"
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// CHECK-NO-MEMOPS: "-target-feature" "-memops"
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@ -0,0 +1,10 @@
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// RUN: %clang -target hexagon -### -mnvj %s 2>&1 \
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// RUN: | FileCheck %s -check-prefix CHECK-NVJ
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// RUN: %clang -target hexagon -### -mno-nvj %s 2>&1 \
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// RUN: | FileCheck %s -check-prefix CHECK-NO-NVJ
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// CHECK-NVJ: "-target-feature" "+nvj"
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// CHECK-NO-NVJ: "-target-feature" "-nvj"
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@ -0,0 +1,10 @@
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// RUN: %clang -target hexagon -### -mnvs %s 2>&1 \
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// RUN: | FileCheck %s -check-prefix CHECK-NVS
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// RUN: %clang -target hexagon -### -mno-nvs %s 2>&1 \
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// RUN: | FileCheck %s -check-prefix CHECK-NO-NVS
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// CHECK-NVS: "-target-feature" "+nvs"
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// CHECK-NO-NVS: "-target-feature" "-nvs"
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