forked from OSchip/llvm-project
Partition use lists so defs always come before uses.
This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). llvm-svn: 161634
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@ -513,11 +513,20 @@ public:
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assert(Op && "Cannot increment end iterator!");
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assert(Op && "Cannot increment end iterator!");
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Op = getNextOperandForReg(Op);
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Op = getNextOperandForReg(Op);
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// If this is an operand we don't care about, skip it.
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// All defs come before the uses, so stop def_iterator early.
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while (Op && ((!ReturnUses && Op->isUse()) ||
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if (!ReturnUses) {
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(!ReturnDefs && Op->isDef()) ||
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if (Op) {
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(SkipDebug && Op->isDebug())))
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if (Op->isUse())
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Op = getNextOperandForReg(Op);
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Op = 0;
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else
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assert(!Op->isDebug() && "Can't have debug defs");
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}
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} else {
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// If this is an operand we don't care about, skip it.
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while (Op && ((!ReturnDefs && Op->isDef()) ||
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(SkipDebug && Op->isDebug())))
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Op = getNextOperandForReg(Op);
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}
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return *this;
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return *this;
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}
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}
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@ -144,9 +144,17 @@ void MachineRegisterInfo::addRegOperandToUseList(MachineOperand *MO) {
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Head->Contents.Reg.Prev = MO;
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Head->Contents.Reg.Prev = MO;
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MO->Contents.Reg.Prev = Last;
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MO->Contents.Reg.Prev = Last;
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// Insert at the front.
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// Def operands always precede uses. This allows def_iterator to stop early.
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MO->Contents.Reg.Next = Head;
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// Insert def operands at the front, and use operands at the back.
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HeadRef = MO;
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if (MO->isDef()) {
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// Insert def at the front.
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MO->Contents.Reg.Next = Head;
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HeadRef = MO;
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} else {
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// Insert use at the end.
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MO->Contents.Reg.Next = 0;
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Last->Contents.Reg.Next = MO;
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}
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}
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}
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/// Remove MO from its use-def list.
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/// Remove MO from its use-def list.
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@ -3,8 +3,8 @@
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; PR8573
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; PR8573
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; CHECK: foo:
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; CHECK: foo:
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; CHECK: movl %esi, %ecx
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; CHECK: leaq (%rdi), %rax
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; CHECK-NEXT: leaq (%rdi), %rax
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; CHECK-NEXT: movl %esi, %ecx
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; CHECK-NEXT: monitor
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; CHECK-NEXT: monitor
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; WIN64: foo:
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; WIN64: foo:
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; WIN64: leaq (%rcx), %rax
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; WIN64: leaq (%rcx), %rax
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@ -31,7 +31,7 @@ entry:
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; X64: test3:
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; X64: test3:
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; X64: notl
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; X64: notl
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; X64: andl
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; X64: andl
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; X64: shrl %eax
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; X64: shrl
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; X64: ret
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; X64: ret
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; X32: test3:
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; X32: test3:
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