forked from OSchip/llvm-project
[MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.
Summary: Current PRE hoists common computations into CMBB = DT->findNearestCommonDominator(MBB, MBB1). However, if CMBB is in a hot loop body, we might get performance degradation. Differential Revision: https://reviews.llvm.org/D64394 llvm-svn: 366570
This commit is contained in:
Kai Luo
parent
e238a4c757
commit
dec624682e
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@ -21,6 +21,7 @@
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/CFG.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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@ -66,6 +67,7 @@ namespace {
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AliasAnalysis *AA;
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MachineDominatorTree *DT;
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MachineRegisterInfo *MRI;
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MachineBlockFrequencyInfo *MBFI;
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public:
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static char ID; // Pass identification
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@ -83,6 +85,8 @@ namespace {
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AU.addPreservedID(MachineLoopInfoID);
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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AU.addRequired<MachineBlockFrequencyInfo>();
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AU.addPreserved<MachineBlockFrequencyInfo>();
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}
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void releaseMemory() override {
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@ -133,6 +137,11 @@ namespace {
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bool isPRECandidate(MachineInstr *MI);
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bool ProcessBlockPRE(MachineDominatorTree *MDT, MachineBasicBlock *MBB);
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bool PerformSimplePRE(MachineDominatorTree *DT);
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/// Heuristics to see if it's beneficial to move common computations of MBB
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/// and MBB1 to CandidateBB.
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bool isBeneficalToHoistInto(MachineBasicBlock *CandidateBB,
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MachineBasicBlock *MBB,
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MachineBasicBlock *MBB1);
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};
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} // end anonymous namespace
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@ -802,6 +811,9 @@ bool MachineCSE::ProcessBlockPRE(MachineDominatorTree *DT,
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if (!CMBB->isLegalToHoistInto())
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continue;
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if (!isBeneficalToHoistInto(CMBB, MBB, MBB1))
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continue;
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// Two instrs are partial redundant if their basic blocks are reachable
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// from one to another but one doesn't dominate another.
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if (CMBB != MBB1) {
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@ -854,6 +866,18 @@ bool MachineCSE::PerformSimplePRE(MachineDominatorTree *DT) {
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return Changed;
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}
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bool MachineCSE::isBeneficalToHoistInto(MachineBasicBlock *CandidateBB,
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MachineBasicBlock *MBB,
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MachineBasicBlock *MBB1) {
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if (CandidateBB->getParent()->getFunction().hasMinSize())
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return true;
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assert(DT->dominates(CandidateBB, MBB) && "CandidateBB should dominate MBB");
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assert(DT->dominates(CandidateBB, MBB1) &&
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"CandidateBB should dominate MBB1");
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return MBFI->getBlockFreq(CandidateBB) <=
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MBFI->getBlockFreq(MBB) + MBFI->getBlockFreq(MBB1);
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}
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bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
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if (skipFunction(MF.getFunction()))
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return false;
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@ -863,6 +887,7 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
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MRI = &MF.getRegInfo();
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AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
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DT = &getAnalysis<MachineDominatorTree>();
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MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
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LookAheadLimit = TII->getMachineCSELookAheadLimit();
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bool ChangedPRE, ChangedCSE;
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ChangedPRE = PerformSimplePRE(DT);
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@ -98,9 +98,9 @@
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: Machine Natural Loop Construction
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; CHECK-NEXT: Early Machine Loop Invariant Code Motion
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; CHECK-NEXT: Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Common Subexpression Elimination
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; CHECK-NEXT: MachinePostDominator Tree Construction
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; CHECK-NEXT: Machine Block Frequency Analysis
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; CHECK-NEXT: Machine code sinking
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; CHECK-NEXT: Peephole Optimizations
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; CHECK-NEXT: Remove dead machine instructions
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@ -72,9 +72,9 @@
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: Machine Natural Loop Construction
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; CHECK-NEXT: Early Machine Loop Invariant Code Motion
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; CHECK-NEXT: Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Common Subexpression Elimination
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; CHECK-NEXT: MachinePostDominator Tree Construction
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; CHECK-NEXT: Machine Block Frequency Analysis
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; CHECK-NEXT: Machine code sinking
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; CHECK-NEXT: Peephole Optimizations
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; CHECK-NEXT: Remove dead machine instructions
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@ -8,25 +8,25 @@ define i32 @t(i32 %n, i32 %delta, i32 %a) {
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: lis r7, 0
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; CHECK-P9-NEXT: li r6, 0
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; CHECK-P9-NEXT: li r8, 0
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; CHECK-P9-NEXT: li r9, 0
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; CHECK-P9-NEXT: li r10, 0
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; CHECK-P9-NEXT: ori r7, r7, 65535
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; CHECK-P9-NEXT: .p2align 5
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; CHECK-P9-NEXT: .LBB0_1: # %header
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: addi r10, r10, 1
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; CHECK-P9-NEXT: cmpw r10, r3
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; CHECK-P9-NEXT: addi r8, r5, 1024
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; CHECK-P9-NEXT: addi r9, r9, 1
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; CHECK-P9-NEXT: cmpw r9, r3
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; CHECK-P9-NEXT: blt cr0, .LBB0_4
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; CHECK-P9-NEXT: # %bb.2: # %cont
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: add r9, r9, r4
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; CHECK-P9-NEXT: cmpw r9, r7
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; CHECK-P9-NEXT: add r8, r8, r4
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; CHECK-P9-NEXT: cmpw r8, r7
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; CHECK-P9-NEXT: bgt cr0, .LBB0_1
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; CHECK-P9-NEXT: # %bb.3: # %cont.1
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; CHECK-P9-NEXT: mr r6, r8
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; CHECK-P9-NEXT: addi r6, r5, 1024
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; CHECK-P9-NEXT: .LBB0_4: # %return
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; CHECK-P9-NEXT: mullw r3, r6, r8
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; CHECK-P9-NEXT: addi r3, r5, 1024
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; CHECK-P9-NEXT: mullw r3, r6, r3
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; CHECK-P9-NEXT: blr
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entry:
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br label %header
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@ -75,16 +75,19 @@ define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) local_unnamed_
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; CHECK-P9-NEXT: lis r3, 21845
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; CHECK-P9-NEXT: add r28, r30, r29
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; CHECK-P9-NEXT: ori r27, r3, 21846
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; CHECK-P9-NEXT: b .LBB1_3
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; CHECK-P9-NEXT: b .LBB1_4
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; CHECK-P9-NEXT: .p2align 4
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; CHECK-P9-NEXT: .LBB1_1: # %sw.bb3
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: add r28, r3, r28
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; CHECK-P9-NEXT: mulli r3, r30, 23
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; CHECK-P9-NEXT: .LBB1_2: # %sw.epilog
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: add r28, r3, r28
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; CHECK-P9-NEXT: .LBB1_3: # %sw.epilog
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: cmpwi r28, 1025
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; CHECK-P9-NEXT: bge cr0, .LBB1_6
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; CHECK-P9-NEXT: .LBB1_3: # %while.cond
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; CHECK-P9-NEXT: bge cr0, .LBB1_7
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; CHECK-P9-NEXT: .LBB1_4: # %while.cond
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: extsw r3, r29
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; CHECK-P9-NEXT: bl bar
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@ -101,41 +104,40 @@ define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) local_unnamed_
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; CHECK-P9-NEXT: add r4, r4, r5
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; CHECK-P9-NEXT: slwi r5, r4, 1
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; CHECK-P9-NEXT: add r4, r4, r5
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; CHECK-P9-NEXT: subf r5, r4, r3
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; CHECK-P9-NEXT: mulli r4, r29, 13
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; CHECK-P9-NEXT: mulli r3, r30, 23
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; CHECK-P9-NEXT: cmplwi r5, 1
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; CHECK-P9-NEXT: subf r3, r4, r3
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; CHECK-P9-NEXT: cmplwi r3, 1
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; CHECK-P9-NEXT: beq cr0, .LBB1_1
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; CHECK-P9-NEXT: # %bb.4: # %while.cond
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; CHECK-P9-NEXT: # %bb.5: # %while.cond
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: cmplwi r5, 0
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; CHECK-P9-NEXT: bne cr0, .LBB1_2
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; CHECK-P9-NEXT: # %bb.5: # %sw.bb
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; CHECK-P9-NEXT: cmplwi r3, 0
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; CHECK-P9-NEXT: bne cr0, .LBB1_3
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; CHECK-P9-NEXT: # %bb.6: # %sw.bb
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; CHECK-P9-NEXT: #
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; CHECK-P9-NEXT: add r28, r4, r28
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; CHECK-P9-NEXT: cmpwi r28, 1025
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; CHECK-P9-NEXT: blt cr0, .LBB1_3
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; CHECK-P9-NEXT: .LBB1_6: # %while.end
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; CHECK-P9-NEXT: lis r5, -13108
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; CHECK-P9-NEXT: ori r5, r5, 52429
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; CHECK-P9-NEXT: mullw r5, r28, r5
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; CHECK-P9-NEXT: lis r6, 13107
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; CHECK-P9-NEXT: ori r6, r6, 13108
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; CHECK-P9-NEXT: cmplw r5, r6
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; CHECK-P9-NEXT: blt cr0, .LBB1_8
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; CHECK-P9-NEXT: # %bb.7: # %if.then8
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; CHECK-P9-NEXT: extsw r4, r4
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; CHECK-P9-NEXT: extsw r5, r28
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; CHECK-P9-NEXT: mulli r3, r29, 13
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; CHECK-P9-NEXT: b .LBB1_2
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; CHECK-P9-NEXT: .LBB1_7: # %while.end
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; CHECK-P9-NEXT: lis r3, -13108
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; CHECK-P9-NEXT: ori r3, r3, 52429
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; CHECK-P9-NEXT: mullw r3, r28, r3
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; CHECK-P9-NEXT: lis r4, 13107
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; CHECK-P9-NEXT: ori r4, r4, 13108
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; CHECK-P9-NEXT: cmplw r3, r4
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; CHECK-P9-NEXT: blt cr0, .LBB1_9
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; CHECK-P9-NEXT: # %bb.8: # %if.then8
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; CHECK-P9-NEXT: mulli r3, r29, 13
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; CHECK-P9-NEXT: mulli r5, r30, 23
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; CHECK-P9-NEXT: extsw r4, r28
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; CHECK-P9-NEXT: extsw r3, r3
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; CHECK-P9-NEXT: extsw r5, r5
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; CHECK-P9-NEXT: sub r3, r4, r3
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; CHECK-P9-NEXT: sub r4, r5, r4
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; CHECK-P9-NEXT: sub r3, r3, r5
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; CHECK-P9-NEXT: rldicl r4, r4, 1, 63
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; CHECK-P9-NEXT: rldicl r3, r3, 1, 63
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; CHECK-P9-NEXT: or r3, r4, r3
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; CHECK-P9-NEXT: b .LBB1_9
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; CHECK-P9-NEXT: .LBB1_8: # %cleanup20
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; CHECK-P9-NEXT: li r3, 0
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; CHECK-P9-NEXT: rldicl r4, r4, 1, 63
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; CHECK-P9-NEXT: or r3, r3, r4
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; CHECK-P9-NEXT: b .LBB1_10
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; CHECK-P9-NEXT: .LBB1_9: # %cleanup20
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; CHECK-P9-NEXT: li r3, 0
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; CHECK-P9-NEXT: .LBB1_10: # %cleanup20
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; CHECK-P9-NEXT: addi r1, r1, 80
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; CHECK-P9-NEXT: ld r0, 16(r1)
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; CHECK-P9-NEXT: mtlr r0
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@ -84,9 +84,9 @@
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; CHECK-NEXT: MachineDominator Tree Construction
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; CHECK-NEXT: Machine Natural Loop Construction
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; CHECK-NEXT: Early Machine Loop Invariant Code Motion
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; CHECK-NEXT: Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Common Subexpression Elimination
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; CHECK-NEXT: MachinePostDominator Tree Construction
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; CHECK-NEXT: Machine Block Frequency Analysis
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; CHECK-NEXT: Machine code sinking
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; CHECK-NEXT: Peephole Optimizations
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; CHECK-NEXT: Remove dead machine instructions
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