forked from OSchip/llvm-project
Don't mark conditional branch instructions as control barriers.
llvm-svn: 86732
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@ -3601,21 +3601,23 @@ def : Pat<(SPUcall (SPUaform texternalsym:$func, 0)),
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(BRASL texternalsym:$func)>;
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// Unconditional branches:
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
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def BR :
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UncondBranch<0b001001100, (outs), (ins brtarget:$dest),
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"br\t$dest",
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[(br bb:$dest)]>;
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let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
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let isBarrier = 1 in {
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def BR :
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UncondBranch<0b001001100, (outs), (ins brtarget:$dest),
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"br\t$dest",
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[(br bb:$dest)]>;
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// Unconditional, absolute address branch
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def BRA:
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UncondBranch<0b001100000, (outs), (ins brtarget:$dest),
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"bra\t$dest",
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[/* no pattern */]>;
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// Unconditional, absolute address branch
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def BRA:
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UncondBranch<0b001100000, (outs), (ins brtarget:$dest),
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"bra\t$dest",
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[/* no pattern */]>;
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// Indirect branch
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def BI:
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BIForm<0b00010101100, "bi\t$func", [(brind R32C:$func)]>;
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// Indirect branch
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def BI:
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BIForm<0b00010101100, "bi\t$func", [(brind R32C:$func)]>;
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}
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// Conditional branches:
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class BRNZInst<dag IOL, list<dag> pattern>:
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