forked from OSchip/llvm-project
[AArch64][GlobalISel] Don't try to use GISel if subtarget doesn't have neon or fp.
Throughout the legalizerinfo we currently make the assumption that the target has neon and FP target features available. Fixing it will require a refactor of the whole thing, so until then make sure we fall back. Works around PR42734 Differential Revision: https://reviews.llvm.org/D65244 llvm-svn: 366957
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@ -52,6 +52,12 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
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const LLT v2s64 = LLT::vector(2, 64);
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const LLT v2p0 = LLT::vector(2, p0);
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// FIXME: support subtargets which have neon/fp-armv8 disabled.
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if (!ST.hasNEON() || !ST.hasFPARMv8()) {
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computeTables();
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return;
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}
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getActionDefinitionsBuilder(G_IMPLICIT_DEF)
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.legalFor({p0, s1, s8, s16, s32, s64, v4s32, v2s64})
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.clampScalar(0, s1, s64)
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@ -0,0 +1,13 @@
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; RUN: not llc -o - -verify-machineinstrs -global-isel -global-isel-abort=1 -stop-after=legalizer %s 2>&1 | FileCheck %s
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-unknown"
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; CHECK: unable to legalize instruction: G_STORE %1:_(s128), %0:_(p0) :: (store 16 into %ir.ptr) (in function: foo)
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define void @foo(i128 *%ptr) #0 align 2 {
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entry:
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store i128 0, i128* %ptr, align 16
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ret void
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}
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attributes #0 = { "use-soft-float"="false" "target-features"="-fp-armv8,-neon" }
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