forked from OSchip/llvm-project
[Hexagon] Remove USR_OVF from CtrRegs register class
USR_OVF is a subregister of USR, which is a member of CtrRegs. Having both a register and its proper subregister in the same register class has bad consequences for lane mask calculation: based solely on the lane mask info, USR_OVF would not appear to be a subregister of USR. llvm-svn: 282192
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@ -260,7 +260,10 @@ def CtrRegs : RegisterClass<"Hexagon", [i32], 32,
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(add LC0, SA0, LC1, SA1,
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P3_0, C5,
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M0, M1, C6, C7, C8, CS0, CS1, UPCL, UPCH,
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USR, USR_OVF, UGP, GP, PC)>;
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USR, UGP, GP, PC)>;
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let isAllocatable = 0 in
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def UsrBits : RegisterClass<"Hexagon", [i1], 0, (add USR_OVF)>;
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let Size = 64, isAllocatable = 0 in
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def CtrRegs64 : RegisterClass<"Hexagon", [i64], 64,
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