forked from OSchip/llvm-project
[X86] Vectorcall Calling Convention - Adding CodeGen Complete Support
Fixing build issues. llvm-svn: 290244
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@ -62,23 +62,23 @@ static ArrayRef<MCPhysReg> CC_X86_VectorCallGetSSEs(const MVT &ValVT) {
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if (ValVT.is512BitVector()) {
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static const MCPhysReg RegListZMM[] = {X86::ZMM0, X86::ZMM1, X86::ZMM2,
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X86::ZMM3, X86::ZMM4, X86::ZMM5};
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return RegListZMM;
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return makeArrayRef(std::begin(RegListZMM), std::end(RegListZMM));
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}
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if (ValVT.is256BitVector()) {
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static const MCPhysReg RegListYMM[] = {X86::YMM0, X86::YMM1, X86::YMM2,
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X86::YMM3, X86::YMM4, X86::YMM5};
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return RegListYMM;
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return makeArrayRef(std::begin(RegListYMM), std::end(RegListYMM));
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}
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static const MCPhysReg RegListXMM[] = {X86::XMM0, X86::XMM1, X86::XMM2,
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X86::XMM3, X86::XMM4, X86::XMM5};
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return RegListXMM;
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return makeArrayRef(std::begin(RegListXMM), std::end(RegListXMM));
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}
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static ArrayRef<MCPhysReg> CC_X86_64_VectorCallGetGPRs() {
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static const MCPhysReg RegListGPR[] = {X86::RCX, X86::RDX, X86::R8, X86::R9};
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return RegListGPR;
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return makeArrayRef(std::begin(RegListGPR), std::end(RegListGPR));
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}
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static bool CC_X86_VectorCallAssignRegister(unsigned &ValNo, MVT &ValVT,
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