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Simplify ArchSpec::IsMIPS() 

llvm-svn: 360865
This commit is contained in:
Fangrui Song 2019-05-16 08:37:32 +00:00
parent 3e92df3e39
commit ddb93b637e
10 changed files with 15 additions and 66 deletions
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5
lldb/source/Plugins/ABI/SysV-mips64/ABISysV_mips64.cpp
View File

@ -553,11 +553,8 @@ size_t ABISysV_mips64::GetRedZoneSize() const { return 0; }
ABISP
ABISysV_mips64::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) {
const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch();
if ((arch_type == llvm::Triple::mips64) ||
(arch_type == llvm::Triple::mips64el)) {
if (arch.GetTriple().isMIPS64())
return ABISP(new ABISysV_mips64(process_sp));
}
return ABISP();
}

10
lldb/source/Plugins/Disassembler/llvm/DisassemblerLLVMC.cpp
View File

@ -1178,10 +1178,7 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
break;
}
if (triple.getArch() == llvm::Triple::mips ||
triple.getArch() == llvm::Triple::mipsel ||
triple.getArch() == llvm::Triple::mips64 ||
triple.getArch() == llvm::Triple::mips64el) {
if (arch.IsMIPS()) {
uint32_t arch_flags = arch.GetFlags();
if (arch_flags & ArchSpec::eMIPSAse_msa)
features_str += "+msa,";
@ -1219,10 +1216,7 @@ DisassemblerLLVMC::DisassemblerLLVMC(const ArchSpec &arch,
if (!m_alternate_disasm_up)
m_disasm_up.reset();
} else if (llvm_arch == llvm::Triple::mips ||
llvm_arch == llvm::Triple::mipsel ||
llvm_arch == llvm::Triple::mips64 ||
llvm_arch == llvm::Triple::mips64el) {
} else if (arch.IsMIPS()) {
/* Create alternate disassembler for MIPS16 and microMIPS */
uint32_t arch_flags = arch.GetFlags();
if (arch_flags & ArchSpec::eMIPSAse_mips16)

5
lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
View File

@ -488,10 +488,7 @@ bool DYLDRendezvous::ReadSOEntryFromMemory(lldb::addr_t addr, SOEntry &entry) {
const ArchSpec &arch = m_process->GetTarget().GetArchitecture();
if ((arch.GetTriple().getOS() == llvm::Triple::FreeBSD ||
arch.GetTriple().getOS() == llvm::Triple::NetBSD) &&
(arch.GetMachine() == llvm::Triple::mips ||
arch.GetMachine() == llvm::Triple::mipsel ||
arch.GetMachine() == llvm::Triple::mips64 ||
arch.GetMachine() == llvm::Triple::mips64el)) {
arch.IsMIPS()) {
addr_t mips_l_offs;
if (!(addr = ReadPointer(addr, &mips_l_offs)))
return false;

6
lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
View File

@ -2185,11 +2185,7 @@ unsigned ObjectFileELF::ParseSymbols(Symtab *symtab, user_id_t start_id,
* class
* accordingly.
*/
const llvm::Triple::ArchType llvm_arch = arch.GetMachine();
if (llvm_arch == llvm::Triple::mips ||
llvm_arch == llvm::Triple::mipsel ||
llvm_arch == llvm::Triple::mips64 ||
llvm_arch == llvm::Triple::mips64el) {
if (arch.IsMIPS()) {
if (IS_MICROMIPS(symbol.st_other))
m_address_class_map[symbol.st_value] = AddressClass::eCodeAlternateISA;
else if ((symbol.st_value & 1) && (symbol_type == eSymbolTypeCode)) {

9
lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
View File

@ -403,14 +403,7 @@ MmapArgList PlatformLinux::GetMmapArgumentList(const ArchSpec &arch,
unsigned prot, unsigned flags,
addr_t fd, addr_t offset) {
uint64_t flags_platform = 0;
uint64_t map_anon = MAP_ANON;
// To get correct flags for MIPS Architecture
if (arch.GetTriple().getArch() == llvm::Triple::mips64 ||
arch.GetTriple().getArch() == llvm::Triple::mips64el ||
arch.GetTriple().getArch() == llvm::Triple::mips ||
arch.GetTriple().getArch() == llvm::Triple::mipsel)
map_anon = 0x800;
uint64_t map_anon = arch.IsMIPS() ? 0x800 : MAP_ANON;
if (flags & eMmapFlagsPrivate)
flags_platform |= MAP_PRIVATE;

6
lldb/source/Plugins/Process/FreeBSD/ProcessFreeBSD.cpp
View File

@ -1020,11 +1020,7 @@ bool ProcessFreeBSD::IsSoftwareStepBreakpoint(lldb::tid_t tid) {
bool ProcessFreeBSD::SupportHardwareSingleStepping() const {
lldb_private::ArchSpec arch = GetTarget().GetArchitecture();
if (arch.GetMachine() == llvm::Triple::arm ||
arch.GetMachine() == llvm::Triple::mips64 ||
arch.GetMachine() == llvm::Triple::mips64el ||
arch.GetMachine() == llvm::Triple::mips ||
arch.GetMachine() == llvm::Triple::mipsel)
if (arch.GetMachine() == llvm::Triple::arm || arch.IsMIPS())
return false;
return true;
}

12
lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
View File

@ -1007,11 +1007,7 @@ NativeProcessLinux::SetupSoftwareSingleStepping(NativeThreadLinux &thread) {
// Arm mode
error = SetSoftwareBreakpoint(next_pc, 4);
}
} else if (m_arch.GetMachine() == llvm::Triple::mips64 ||
m_arch.GetMachine() == llvm::Triple::mips64el ||
m_arch.GetMachine() == llvm::Triple::mips ||
m_arch.GetMachine() == llvm::Triple::mipsel ||
m_arch.GetMachine() == llvm::Triple::ppc64le)
} else if (m_arch.IsMIPS() || m_arch.GetMachine() == llvm::Triple::ppc64le)
error = SetSoftwareBreakpoint(next_pc, 4);
else {
// No size hint is given for the next breakpoint
@ -1031,11 +1027,7 @@ NativeProcessLinux::SetupSoftwareSingleStepping(NativeThreadLinux &thread) {
}
bool NativeProcessLinux::SupportHardwareSingleStepping() const {
if (m_arch.GetMachine() == llvm::Triple::arm ||
m_arch.GetMachine() == llvm::Triple::mips64 ||
m_arch.GetMachine() == llvm::Triple::mips64el ||
m_arch.GetMachine() == llvm::Triple::mips ||
m_arch.GetMachine() == llvm::Triple::mipsel)
if (m_arch.GetMachine() == llvm::Triple::arm || m_arch.IsMIPS())
return false;
return true;
}

12
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
View File

@ -1720,19 +1720,13 @@ GDBRemoteCommunicationClient::GetWatchpointsTriggerAfterInstruction(
// On targets like MIPS and ppc64le, watchpoint exceptions are always
// generated before the instruction is executed. The connected target may
// not support qHostInfo or qWatchpointSupportInfo packets.
after =
!(atype == llvm::Triple::mips || atype == llvm::Triple::mipsel ||
atype == llvm::Triple::mips64 || atype == llvm::Triple::mips64el ||
atype == llvm::Triple::ppc64le);
after = !(arch.IsMIPS() || atype == llvm::Triple::ppc64le);
} else {
// For MIPS and ppc64le, set m_watchpoints_trigger_after_instruction to
// eLazyBoolNo if it is not calculated before.
if ((m_watchpoints_trigger_after_instruction == eLazyBoolCalculate &&
(atype == llvm::Triple::mips || atype == llvm::Triple::mipsel ||
atype == llvm::Triple::mips64 || atype == llvm::Triple::mips64el)) ||
atype == llvm::Triple::ppc64le) {
if (m_watchpoints_trigger_after_instruction == eLazyBoolCalculate &&
(arch.IsMIPS() || atype == llvm::Triple::ppc64le))
m_watchpoints_trigger_after_instruction = eLazyBoolNo;
}
after = (m_watchpoints_trigger_after_instruction != eLazyBoolNo);
}

6
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
View File

@ -233,11 +233,7 @@ GDBRemoteCommunicationServerCommon::Handle_qHostInfo(
if (host_arch.GetMachine() == llvm::Triple::aarch64 ||
host_arch.GetMachine() == llvm::Triple::aarch64_be ||
host_arch.GetMachine() == llvm::Triple::arm ||
host_arch.GetMachine() == llvm::Triple::armeb ||
host_arch.GetMachine() == llvm::Triple::mips64 ||
host_arch.GetMachine() == llvm::Triple::mips64el ||
host_arch.GetMachine() == llvm::Triple::mips ||
host_arch.GetMachine() == llvm::Triple::mipsel)
host_arch.GetMachine() == llvm::Triple::armeb || host_arch.IsMIPS())
response.Printf("watchpoint_exceptions_received:before;");
else
response.Printf("watchpoint_exceptions_received:after;");

10
lldb/source/Utility/ArchSpec.cpp
View File

@ -595,11 +595,7 @@ const char *ArchSpec::GetArchitectureName() const {
return "unknown";
}
bool ArchSpec::IsMIPS() const {
const llvm::Triple::ArchType machine = GetMachine();
return machine == llvm::Triple::mips || machine == llvm::Triple::mipsel ||
machine == llvm::Triple::mips64 || machine == llvm::Triple::mips64el;
}
bool ArchSpec::IsMIPS() const { return GetTriple().isMIPS(); }
std::string ArchSpec::GetTargetABI() const {
@ -639,10 +635,8 @@ void ArchSpec::SetFlags(std::string elf_abi) {
std::string ArchSpec::GetClangTargetCPU() const {
std::string cpu;
const llvm::Triple::ArchType machine = GetMachine();
if (machine == llvm::Triple::mips || machine == llvm::Triple::mipsel ||
machine == llvm::Triple::mips64 || machine == llvm::Triple::mips64el) {
if (IsMIPS()) {
switch (m_core) {
case ArchSpec::eCore_mips32:
case ArchSpec::eCore_mips32el: