forked from OSchip/llvm-project
Don't make use of an illegal type (i64) when
lowering f64 function arguments. llvm-svn: 60944
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@ -347,12 +347,37 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
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RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Val));
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}
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break;
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case MVT::f64:
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case MVT::f64: {
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ObjSize = 8;
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// Otherwise, convert this to a FP value in int regs.
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Val = DAG.getNode(ISD::BIT_CONVERT, MVT::i64, Val);
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// FALL THROUGH
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case MVT::i64:
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if (RegsToPass.size() >= 6) {
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ValToStore = Val; // Whole thing is passed in memory.
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break;
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}
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// Break into top and bottom parts by storing to the stack and loading
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// out the parts as integers. Top part goes in a reg.
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SDValue StackPtr = DAG.CreateStackTemporary(MVT::f64, MVT::i32);
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SDValue Store = DAG.getStore(DAG.getEntryNode(), Val, StackPtr, NULL, 0);
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// Sparc is big-endian, so the high part comes first.
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SDValue Hi = DAG.getLoad(MVT::i32, Store, StackPtr, NULL, 0, 0);
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// Increment the pointer to the other half.
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StackPtr = DAG.getNode(ISD::ADD, StackPtr.getValueType(), StackPtr,
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DAG.getIntPtrConstant(4));
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// Load the low part.
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SDValue Lo = DAG.getLoad(MVT::i32, Store, StackPtr, NULL, 0, 0);
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RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Hi));
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if (RegsToPass.size() >= 6) {
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ValToStore = Lo;
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ArgOffset += 4;
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ObjSize = 4;
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} else {
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RegsToPass.push_back(std::make_pair(ArgRegs[RegsToPass.size()], Lo));
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}
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break;
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}
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case MVT::i64: {
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ObjSize = 8;
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if (RegsToPass.size() >= 6) {
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ValToStore = Val; // Whole thing is passed in memory.
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@ -375,6 +400,7 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
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}
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break;
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}
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}
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if (ValToStore.getNode()) {
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SDValue StackPtr = DAG.getRegister(SP::O6, MVT::i32);
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