forked from OSchip/llvm-project
optimize bitcasts from large integers to vector into vector
element insertion from the pieces that feed into the vector. This handles a pattern that occurs frequently due to code generated for the x86-64 abi. We now compile something like this: struct S { float A, B, C, D; }; struct S g; struct S bar() { struct S A = g; ++A.A; ++A.C; return A; } into all nice vector operations: _bar: ## @bar ## BB#0: ## %entry movq _g@GOTPCREL(%rip), %rax movss LCPI1_0(%rip), %xmm1 movss (%rax), %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 12(%rax), %xmm3 pshufd $16, %xmm2, %xmm2 unpcklps %xmm2, %xmm0 addss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 pshufd $16, %xmm3, %xmm2 unpcklps %xmm2, %xmm1 ret instead of icky integer operations: _bar: ## @bar movq _g@GOTPCREL(%rip), %rax movss LCPI1_0(%rip), %xmm1 movss (%rax), %xmm0 addss %xmm1, %xmm0 movd %xmm0, %ecx movl 4(%rax), %edx movl 12(%rax), %esi shlq $32, %rdx addq %rcx, %rdx movd %rdx, %xmm0 addss 8(%rax), %xmm1 movd %xmm1, %eax shlq $32, %rsi addq %rax, %rsi movd %rsi, %xmm1 ret This resolves rdar://8360454 llvm-svn: 112343
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02d13d1356
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dd6601048e
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@ -1362,6 +1362,116 @@ static Instruction *OptimizeVectorResize(Value *InVal, const VectorType *DestTy,
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return new ShuffleVectorInst(InVal, V2, Mask);
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}
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static bool isMultipleOfTypeSize(unsigned Value, const Type *Ty) {
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return Value % Ty->getPrimitiveSizeInBits() == 0;
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}
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static bool getTypeSizeIndex(unsigned Value, const Type *Ty) {
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return Value / Ty->getPrimitiveSizeInBits();
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}
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/// CollectInsertionElements - V is a value which is inserted into a vector of
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/// VecEltTy. Look through the value to see if we can decompose it into
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/// insertions into the vector. See the example in the comment for
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/// OptimizeIntegerToVectorInsertions for the pattern this handles.
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/// The type of V is always a non-zero multiple of VecEltTy's size.
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///
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/// This returns false if the pattern can't be matched or true if it can,
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/// filling in Elements with the elements found here.
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static bool CollectInsertionElements(Value *V, unsigned ElementIndex,
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SmallVectorImpl<Value*> &Elements,
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const Type *VecEltTy) {
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// If we got down to a value of the right type, we win, try inserting into the
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// right element.
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if (V->getType() == VecEltTy) {
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// Fail if multiple elements are inserted into this slot.
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if (ElementIndex >= Elements.size() || Elements[ElementIndex] != 0)
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return false;
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Elements[ElementIndex] = V;
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return true;
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}
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//if (Constant *C = dyn_cast<Constant>(V)) {
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// Figure out the # elements this provides, and bitcast it or slice it up
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// as required.
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//}
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if (!V->hasOneUse()) return false;
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Instruction *I = dyn_cast<Instruction>(V);
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if (I == 0) return false;
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switch (I->getOpcode()) {
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default: return false; // Unhandled case.
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case Instruction::BitCast:
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return CollectInsertionElements(I->getOperand(0), ElementIndex,
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Elements, VecEltTy);
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case Instruction::ZExt:
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if (!isMultipleOfTypeSize(
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I->getOperand(0)->getType()->getPrimitiveSizeInBits(),
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VecEltTy))
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return false;
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return CollectInsertionElements(I->getOperand(0), ElementIndex,
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Elements, VecEltTy);
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case Instruction::Or:
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return CollectInsertionElements(I->getOperand(0), ElementIndex,
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Elements, VecEltTy) &&
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CollectInsertionElements(I->getOperand(1), ElementIndex,
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Elements, VecEltTy);
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case Instruction::Shl: {
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// Must be shifting by a constant that is a multiple of the element size.
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ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
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if (CI == 0) return false;
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if (!isMultipleOfTypeSize(CI->getZExtValue(), VecEltTy)) return false;
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unsigned IndexShift = getTypeSizeIndex(CI->getZExtValue(), VecEltTy);
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return CollectInsertionElements(I->getOperand(0), ElementIndex+IndexShift,
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Elements, VecEltTy);
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}
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}
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}
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/// OptimizeIntegerToVectorInsertions - If the input is an 'or' instruction, we
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/// may be doing shifts and ors to assemble the elements of the vector manually.
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/// Try to rip the code out and replace it with insertelements. This is to
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/// optimize code like this:
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///
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/// %tmp37 = bitcast float %inc to i32
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/// %tmp38 = zext i32 %tmp37 to i64
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/// %tmp31 = bitcast float %inc5 to i32
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/// %tmp32 = zext i32 %tmp31 to i64
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/// %tmp33 = shl i64 %tmp32, 32
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/// %ins35 = or i64 %tmp33, %tmp38
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/// %tmp43 = bitcast i64 %ins35 to <2 x float>
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///
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/// Into two insertelements that do "buildvector{%inc, %inc5}".
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static Value *OptimizeIntegerToVectorInsertions(BitCastInst &CI,
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InstCombiner &IC) {
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const VectorType *DestVecTy = cast<VectorType>(CI.getType());
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Value *IntInput = CI.getOperand(0);
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SmallVector<Value*, 8> Elements(DestVecTy->getNumElements());
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if (!CollectInsertionElements(IntInput, 0, Elements,
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DestVecTy->getElementType()))
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return 0;
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// If we succeeded, we know that all of the element are specified by Elements
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// or are zero if Elements has a null entry. Recast this as a set of
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// insertions.
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Value *Result = Constant::getNullValue(CI.getType());
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for (unsigned i = 0, e = Elements.size(); i != e; ++i) {
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if (Elements[i] == 0) continue; // Unset element.
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Result = IC.Builder->CreateInsertElement(Result, Elements[i],
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IC.Builder->getInt32(i));
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}
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return Result;
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}
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/// OptimizeIntToFloatBitCast - See if we can optimize an integer->float/double
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/// bitcast. The various long double bitcasts can't get in here.
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static Instruction *OptimizeIntToFloatBitCast(BitCastInst &CI,InstCombiner &IC){
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@ -1478,16 +1588,24 @@ Instruction *InstCombiner::visitBitCast(BitCastInst &CI) {
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// FIXME: Canonicalize bitcast(insertelement) -> insertelement(bitcast)
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}
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// If this is a cast from an integer to vector, check to see if the input
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// is a trunc or zext of a bitcast from vector. If so, we can replace all
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// the casts with a shuffle and (potentially) a bitcast.
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if (isa<IntegerType>(SrcTy) && (isa<TruncInst>(Src) || isa<ZExtInst>(Src))){
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CastInst *SrcCast = cast<CastInst>(Src);
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if (BitCastInst *BCIn = dyn_cast<BitCastInst>(SrcCast->getOperand(0)))
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if (isa<VectorType>(BCIn->getOperand(0)->getType()))
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if (Instruction *I = OptimizeVectorResize(BCIn->getOperand(0),
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if (isa<IntegerType>(SrcTy)) {
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// If this is a cast from an integer to vector, check to see if the input
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// is a trunc or zext of a bitcast from vector. If so, we can replace all
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// the casts with a shuffle and (potentially) a bitcast.
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if (isa<TruncInst>(Src) || isa<ZExtInst>(Src)) {
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CastInst *SrcCast = cast<CastInst>(Src);
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if (BitCastInst *BCIn = dyn_cast<BitCastInst>(SrcCast->getOperand(0)))
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if (isa<VectorType>(BCIn->getOperand(0)->getType()))
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if (Instruction *I = OptimizeVectorResize(BCIn->getOperand(0),
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cast<VectorType>(DestTy), *this))
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return I;
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return I;
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}
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// If the input is an 'or' instruction, we may be doing shifts and ors to
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// assemble the elements of the vector manually. Try to rip the code out
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// and replace it with insertelements.
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if (Value *V = OptimizeIntegerToVectorInsertions(CI, *this))
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return ReplaceInstUsesWith(CI, V);
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}
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}
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@ -312,8 +312,8 @@ Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
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// cast of lshr(shl(x,c1),c2) as well as other more complex cases.
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if (I.getOpcode() != Instruction::AShr &&
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CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
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DEBUG(dbgs() << "ICE: GetShiftedValue propagatin shift through expression"
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" to eliminate shift:\n IN: " << *Op0 << "\nSH: " << I << "\n");
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DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression"
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" to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
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return ReplaceInstUsesWith(I,
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GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
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@ -60,3 +60,34 @@ define float @test3(<2 x float> %A, <2 x i64> %B) {
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; CHECK-NEXT: %add = fadd float %tmp24, %tmp4
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; CHECK-NEXT: ret float %add
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}
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define <2 x i32> @test4(i32 %A, i32 %B){
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%tmp38 = zext i32 %A to i64
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%tmp32 = zext i32 %B to i64
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%tmp33 = shl i64 %tmp32, 32
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%ins35 = or i64 %tmp33, %tmp38
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%tmp43 = bitcast i64 %ins35 to <2 x i32>
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ret <2 x i32> %tmp43
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; CHECK: @test4
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; CHECK-NEXT: insertelement <2 x i32> undef, i32 %A, i32 0
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; CHECK-NEXT: insertelement <2 x i32> {{.*}}, i32 %B, i32 1
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; CHECK-NEXT: ret <2 x i32>
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}
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; rdar://8360454
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define <2 x float> @test5(float %A, float %B) {
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%tmp37 = bitcast float %A to i32
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%tmp38 = zext i32 %tmp37 to i64
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%tmp31 = bitcast float %B to i32
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%tmp32 = zext i32 %tmp31 to i64
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%tmp33 = shl i64 %tmp32, 32
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%ins35 = or i64 %tmp33, %tmp38
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%tmp43 = bitcast i64 %ins35 to <2 x float>
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ret <2 x float> %tmp43
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; CHECK: @test5
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; CHECK-NEXT: insertelement <2 x float> undef, float %A, i32 0
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; CHECK-NEXT: insertelement <2 x float> {{.*}}, float %B, i32 1
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; CHECK-NEXT: ret <2 x float>
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}
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