forked from OSchip/llvm-project
parent
d83284c196
commit
dd5beb78a7
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@ -582,8 +582,14 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
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//
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// FIXME: Re-enable coloring with register when it's capable of adding
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// kill markers.
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if (addPass(StackSlotColoringID) != &NoPaddID)
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printAndVerify("After StackSlotColoring");
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addPass(StackSlotColoringID);
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// Run post-ra machine LICM to hoist reloads / remats.
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//
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// FIXME: can this move into MachineLateOptimization?
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addPass(PostRAMachineLICMID);
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printAndVerify("After StackSlotColoring and postra Machine LICM");
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}
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//===---------------------------------------------------------------------===//
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@ -592,10 +598,6 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
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/// Add passes that optimize machine instructions after register allocation.
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void TargetPassConfig::addMachineLateOptimization() {
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// Run post-ra machine LICM to hoist reloads / remats.
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if (addPass(PostRAMachineLICMID) != &NoPassID)
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printAndVerify("After postra Machine LICM");
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// Branch folding must be run after regalloc and prolog/epilog insertion.
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if (addPass(BranchFolderPassID) != &NoPassID)
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printNoVerify("After BranchFolding");
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