forked from OSchip/llvm-project
[AMDGPU][MC][GFX9] Added support of 'inst_offset' modifier for compatibility with SP3
See bug 35329: https://bugs.llvm.org//show_bug.cgi?id=35329 Reviewers: arsenm, vpykhtin, artem.tamazov Differential Revision: https://reviews.llvm.org/D40350 llvm-svn: 318947
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@ -132,6 +132,7 @@ public:
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ImmTyIdxen,
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ImmTyAddr64,
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ImmTyOffset,
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ImmTyInstOffset,
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ImmTyOffset0,
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ImmTyOffset1,
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ImmTyGLC,
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@ -294,8 +295,8 @@ public:
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bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<16>(getImm()); }
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bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); }
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bool isOffsetU12() const { return isImmTy(ImmTyOffset) && isUInt<12>(getImm()); }
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bool isOffsetS13() const { return isImmTy(ImmTyOffset) && isInt<13>(getImm()); }
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bool isOffsetU12() const { return (isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset)) && isUInt<12>(getImm()); }
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bool isOffsetS13() const { return (isImmTy(ImmTyOffset) || isImmTy(ImmTyInstOffset)) && isInt<13>(getImm()); }
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bool isGDS() const { return isImmTy(ImmTyGDS); }
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bool isGLC() const { return isImmTy(ImmTyGLC); }
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bool isSLC() const { return isImmTy(ImmTySLC); }
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@ -642,6 +643,7 @@ public:
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case ImmTyIdxen: OS << "Idxen"; break;
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case ImmTyAddr64: OS << "Addr64"; break;
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case ImmTyOffset: OS << "Offset"; break;
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case ImmTyInstOffset: OS << "InstOffset"; break;
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case ImmTyOffset0: OS << "Offset0"; break;
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case ImmTyOffset1: OS << "Offset1"; break;
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case ImmTyGLC: OS << "GLC"; break;
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@ -4107,6 +4109,7 @@ static const OptionalOperand AMDGPUOptionalOperandTable[] = {
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{"offset1", AMDGPUOperand::ImmTyOffset1, false, nullptr},
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{"gds", AMDGPUOperand::ImmTyGDS, true, nullptr},
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{"offset", AMDGPUOperand::ImmTyOffset, false, nullptr},
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{"inst_offset", AMDGPUOperand::ImmTyInstOffset, false, nullptr},
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{"dfmt", AMDGPUOperand::ImmTyDFMT, false, nullptr},
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{"nfmt", AMDGPUOperand::ImmTyNFMT, false, nullptr},
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{"glc", AMDGPUOperand::ImmTyGLC, true, nullptr},
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@ -31,6 +31,10 @@ flat_atomic_add v[3:4], v5 offset:8 slc
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// GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
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// VIERR: :1: error: invalid operand for instruction
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flat_atomic_add v[3:4], v5 inst_offset:8 slc
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// GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
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// VIERR: :1: error: invalid operand for instruction
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flat_atomic_swap v[3:4], v5 offset:16
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// GFX9: flat_atomic_swap v[3:4], v5 offset:16 ; encoding: [0x10,0x00,0x00,0xdd,0x03,0x05,0x00,0x00]
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// VIERR: :1: error: invalid operand for instruction
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