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AMDGPU: Add helper function for implicit parameter offsets. 

Patch by: Zoltan Gilian

llvm-svn: 241861
This commit is contained in:
Tom Stellard 2015-07-09 21:20:37 +00:00
parent d4b351f0de
commit dcb9f0907f
4 changed files with 28 additions and 4 deletions
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12
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
View File

@ -2649,6 +2649,18 @@ SDValue AMDGPUTargetLowering::CreateLiveInRegister(SelectionDAG &DAG,
return DAG.getRegister(VirtualRegister, VT);
}
uint32_t AMDGPUTargetLowering::getImplicitParameterOffset(
const AMDGPUMachineFunction *MFI, const ImplicitParameter Param) const {
uint64_t ArgOffset = MFI->ABIArgOffset;
switch (Param) {
case GRID_DIM:
return ArgOffset;
case GRID_OFFSET:
return ArgOffset + 4;
}
llvm_unreachable("unexpected implicit parameter type");
}
#define NODE_NAME_CASE(node) case AMDGPUISD::node: return #node;
const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const {

10
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
View File

@ -207,6 +207,16 @@ public:
virtual SDValue CreateLiveInRegister(SelectionDAG &DAG,
const TargetRegisterClass *RC,
unsigned Reg, EVT VT) const;
enum ImplicitParameter {
GRID_DIM,
GRID_OFFSET
};
/// \brief Helper function that returns the byte offset of the given
/// type of implicit parameter.
unsigned getImplicitParameterOffset(const AMDGPUMachineFunction *MFI,
const ImplicitParameter Param) const;
};
namespace AMDGPUISD {

6
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
View File

@ -815,8 +815,10 @@ SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
case Intrinsic::r600_read_local_size_z:
return LowerImplicitParameter(DAG, VT, DL, 8);
case Intrinsic::AMDGPU_read_workdim:
return LowerImplicitParameter(DAG, VT, DL, MFI->ABIArgOffset / 4);
case Intrinsic::AMDGPU_read_workdim: {
uint32_t ByteOffset = getImplicitParameterOffset(MFI, GRID_DIM);
return LowerImplicitParameter(DAG, VT, DL, ByteOffset / 4);
}
case Intrinsic::r600_read_tgid_x:
return CreateLiveInRegister(DAG, &AMDGPU::R600_TReg32RegClass,

4
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
View File

@ -928,6 +928,7 @@ SDValue SITargetLowering::copyToM0(SelectionDAG &DAG, SDValue Chain, SDLoc DL,
SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
SelectionDAG &DAG) const {
MachineFunction &MF = DAG.getMachineFunction();
auto MFI = MF.getInfo<SIMachineFunctionInfo>();
const SIRegisterInfo *TRI =
static_cast<const SIRegisterInfo *>(Subtarget->getRegisterInfo());
@ -966,8 +967,7 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
case Intrinsic::AMDGPU_read_workdim:
return LowerParameter(DAG, VT, VT, DL, DAG.getEntryNode(),
MF.getInfo<SIMachineFunctionInfo>()->ABIArgOffset,
false);
getImplicitParameterOffset(MFI, GRID_DIM), false);
case Intrinsic::r600_read_tgid_x:
return CreateLiveInRegister(DAG, &AMDGPU::SReg_32RegClass,