From dc99f0711393df08e29dadf9caedc428d15ae9df Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 23 Jul 2009 23:09:51 +0000 Subject: [PATCH] Thumb2 does not allow the use of "pc" register as part of the load / store address. llvm-svn: 76909 --- llvm/lib/Target/ARM/ARMInstrThumb2.td | 15 --------------- llvm/test/CodeGen/Thumb2/load-global.ll | 24 ++++++++++++++++-------- llvm/test/CodeGen/Thumb2/pic-load.ll | 21 +++++++++++++++++++++ 3 files changed, 37 insertions(+), 23 deletions(-) create mode 100644 llvm/test/CodeGen/Thumb2/pic-load.ll diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index 5c0a47e8452c..bd76fd1d7c08 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -648,21 +648,6 @@ def t2STRB_POST : T2Iidxldst<(outs GPR:$base_wb), (post_truncsti8 GPR:$src, GPR:$base, t2am_imm8_offset:$offset))]>; -// Address computation and loads and stores in PIC mode. -let isNotDuplicable = 1, AddedComplexity = 10 in { -let canFoldAsLoad = 1 in -def t2PICLDR : T2I_picld<"ldr", UnOpFrag<(load node:$Src)>>; - -def t2PICLDRH : T2I_picld<"ldrh", UnOpFrag<(zextloadi16 node:$Src)>>; -def t2PICLDRB : T2I_picld<"ldrb", UnOpFrag<(zextloadi8 node:$Src)>>; -def t2PICLDRSH : T2I_picld<"ldrsh", UnOpFrag<(sextloadi16 node:$Src)>>; -def t2PICLDRSB : T2I_picld<"ldrsb", UnOpFrag<(sextloadi8 node:$Src)>>; - -def t2PICSTR : T2I_picst<"str", BinOpFrag<(store node:$LHS, node:$RHS)>>; -def t2PICSTRH : T2I_picst<"strh", BinOpFrag<(truncstorei16 node:$LHS, node:$RHS)>>; -def t2PICSTRB : T2I_picst<"strb", BinOpFrag<(truncstorei8 node:$LHS, node:$RHS)>>; -} // isNotDuplicable = 1, AddedComplexity = 10 - // FIXME: ldrd / strd pre / post variants //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/Thumb2/load-global.ll b/llvm/test/CodeGen/Thumb2/load-global.ll index 1b1fe7b1b5fc..4aad567fa8f1 100644 --- a/llvm/test/CodeGen/Thumb2/load-global.ll +++ b/llvm/test/CodeGen/Thumb2/load-global.ll @@ -1,19 +1,27 @@ ; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=static | \ -; RUN: not grep {L_G\$non_lazy_ptr} +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC ; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | \ -; RUN: grep {L_G\$non_lazy_ptr} | count 2 +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC ; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | \ -; RUN: grep {ldr.*pc} | count 1 +; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC ; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | \ -; RUN: grep {GOT} | count 1 +; RUN: llc -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX @G = external global i32 define i32 @test1() { +; STATIC: _test1: +; STATIC: .long _G + +; DYNAMIC: _test1: +; DYNAMIC: .long L_G$non_lazy_ptr + +; PIC: _test1 +; PIC: add r0, pc +; PIC: .long L_G$non_lazy_ptr-(LPC0+4) + +; LINUX: test1 +; LINUX: .long G(GOT) %tmp = load i32* @G ret i32 %tmp } diff --git a/llvm/test/CodeGen/Thumb2/pic-load.ll b/llvm/test/CodeGen/Thumb2/pic-load.ll new file mode 100644 index 000000000000..a31d087e64de --- /dev/null +++ b/llvm/test/CodeGen/Thumb2/pic-load.ll @@ -0,0 +1,21 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -relocation-model=pic | FileCheck %s + + %struct.anon = type { void ()* } + %struct.one_atexit_routine = type { %struct.anon, i32, i8* } +@__dso_handle = external global { } ; <{ }*> [#uses=1] +@llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (void ()*)* @atexit to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] + +define hidden arm_apcscc i32 @atexit(void ()* %func) nounwind { +entry: +; CHECK: atexit: +; CHECK: add r1, pc + %r = alloca %struct.one_atexit_routine, align 4 ; <%struct.one_atexit_routine*> [#uses=3] + %0 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 0, i32 0 ; [#uses=1] + store void ()* %func, void ()** %0, align 4 + %1 = getelementptr %struct.one_atexit_routine* %r, i32 0, i32 1 ; [#uses=1] + store i32 0, i32* %1, align 4 + %2 = call arm_apcscc i32 @atexit_common(%struct.one_atexit_routine* %r, i8* bitcast ({ }* @__dso_handle to i8*)) nounwind ; [#uses=1] + ret i32 %2 +} + +declare arm_apcscc i32 @atexit_common(%struct.one_atexit_routine*, i8*) nounwind