forked from OSchip/llvm-project
Wisely choose sext or zext when widening IV.
Summary: The patch fixes regression caused by two earlier patches D18777 and D18867. Reviewers: reames, sanjoy Differential Revision: http://reviews.llvm.org/D24280 From: Li Huang llvm-svn: 282650
This commit is contained in:
Evgeny Stupachenko
parent
76966bf066
commit
dc8a254663
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@ -880,7 +880,6 @@ class WidenIV {
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// Parameters
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PHINode *OrigPhi;
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Type *WideType;
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bool IsSigned;
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// Context
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LoopInfo *LI;
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@ -894,16 +893,22 @@ class WidenIV {
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const SCEV *WideIncExpr;
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SmallVectorImpl<WeakVH> &DeadInsts;
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SmallPtrSet<Instruction*,16> Widened;
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SmallPtrSet<Instruction *,16> Widened;
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SmallVector<NarrowIVDefUse, 8> NarrowIVUsers;
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enum ExtendKind { ZeroExtended, SignExtended, Unknown };
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// A map tracking the kind of extension used to widen each narrow IV
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// and narrow IV user.
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// Key: pointer to a narrow IV or IV user.
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// Value: the kind of extension used to widen this Instruction.
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DenseMap<AssertingVH<Instruction>, ExtendKind> ExtendKindMap;
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public:
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WidenIV(const WideIVInfo &WI, LoopInfo *LInfo,
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ScalarEvolution *SEv, DominatorTree *DTree,
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SmallVectorImpl<WeakVH> &DI) :
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OrigPhi(WI.NarrowIV),
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WideType(WI.WidestNativeType),
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IsSigned(WI.IsSigned),
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LI(LInfo),
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L(LI->getLoopFor(OrigPhi->getParent())),
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SE(SEv),
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@ -913,6 +918,7 @@ public:
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WideIncExpr(nullptr),
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DeadInsts(DI) {
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assert(L->getHeader() == OrigPhi->getParent() && "Phi must be an IV");
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ExtendKindMap[OrigPhi] = WI.IsSigned ? SignExtended : ZeroExtended;
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}
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PHINode *createWideIV(SCEVExpander &Rewriter);
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@ -926,9 +932,13 @@ protected:
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const SCEVAddRecExpr *WideAR);
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Instruction *cloneBitwiseIVUser(NarrowIVDefUse DU);
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const SCEVAddRecExpr *getWideRecurrence(Instruction *NarrowUse);
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ExtendKind getExtendKind(Instruction *I);
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const SCEVAddRecExpr* getExtendedOperandRecurrence(NarrowIVDefUse DU);
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typedef std::pair<const SCEVAddRecExpr *, ExtendKind> WidenedRecTy;
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WidenedRecTy getWideRecurrence(NarrowIVDefUse DU);
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WidenedRecTy getExtendedOperandRecurrence(NarrowIVDefUse DU);
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const SCEV *getSCEVByOpCode(const SCEV *LHS, const SCEV *RHS,
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unsigned OpCode) const;
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@ -1002,6 +1012,7 @@ Instruction *WidenIV::cloneBitwiseIVUser(NarrowIVDefUse DU) {
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// about the narrow operand yet so must insert a [sz]ext. It is probably loop
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// invariant and will be folded or hoisted. If it actually comes from a
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// widened IV, it should be removed during a future call to widenIVUse.
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bool IsSigned = getExtendKind(NarrowDef) == SignExtended;
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Value *LHS = (NarrowUse->getOperand(0) == NarrowDef)
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? WideDef
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: createExtendInst(NarrowUse->getOperand(0), WideType,
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@ -1086,7 +1097,7 @@ Instruction *WidenIV::cloneArithmeticIVUser(NarrowIVDefUse DU,
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return WideUse == WideAR;
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};
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bool SignExtend = IsSigned;
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bool SignExtend = getExtendKind(NarrowDef) == SignExtended;
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if (!GuessNonIVOperand(SignExtend)) {
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SignExtend = !SignExtend;
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if (!GuessNonIVOperand(SignExtend))
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@ -1112,6 +1123,12 @@ Instruction *WidenIV::cloneArithmeticIVUser(NarrowIVDefUse DU,
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return WideBO;
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}
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WidenIV::ExtendKind WidenIV::getExtendKind(Instruction *I) {
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auto It = ExtendKindMap.find(I);
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assert(It != ExtendKindMap.end() && "Instruction not yet extended!");
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return It->second;
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}
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const SCEV *WidenIV::getSCEVByOpCode(const SCEV *LHS, const SCEV *RHS,
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unsigned OpCode) const {
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if (OpCode == Instruction::Add)
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@ -1127,15 +1144,16 @@ const SCEV *WidenIV::getSCEVByOpCode(const SCEV *LHS, const SCEV *RHS,
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/// No-wrap operations can transfer sign extension of their result to their
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/// operands. Generate the SCEV value for the widened operation without
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/// actually modifying the IR yet. If the expression after extending the
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/// operands is an AddRec for this loop, return it.
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const SCEVAddRecExpr* WidenIV::getExtendedOperandRecurrence(NarrowIVDefUse DU) {
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/// operands is an AddRec for this loop, return the AddRec and the kind of
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/// extension used.
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WidenIV::WidenedRecTy WidenIV::getExtendedOperandRecurrence(NarrowIVDefUse DU) {
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// Handle the common case of add<nsw/nuw>
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const unsigned OpCode = DU.NarrowUse->getOpcode();
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// Only Add/Sub/Mul instructions supported yet.
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if (OpCode != Instruction::Add && OpCode != Instruction::Sub &&
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OpCode != Instruction::Mul)
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return nullptr;
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return {nullptr, Unknown};
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// One operand (NarrowDef) has already been extended to WideDef. Now determine
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// if extending the other will lead to a recurrence.
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@ -1146,14 +1164,15 @@ const SCEVAddRecExpr* WidenIV::getExtendedOperandRecurrence(NarrowIVDefUse DU) {
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const SCEV *ExtendOperExpr = nullptr;
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const OverflowingBinaryOperator *OBO =
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cast<OverflowingBinaryOperator>(DU.NarrowUse);
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if (IsSigned && OBO->hasNoSignedWrap())
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ExtendKind ExtKind = getExtendKind(DU.NarrowDef);
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if (ExtKind == SignExtended && OBO->hasNoSignedWrap())
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ExtendOperExpr = SE->getSignExtendExpr(
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SE->getSCEV(DU.NarrowUse->getOperand(ExtendOperIdx)), WideType);
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else if(!IsSigned && OBO->hasNoUnsignedWrap())
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else if(ExtKind == ZeroExtended && OBO->hasNoUnsignedWrap())
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ExtendOperExpr = SE->getZeroExtendExpr(
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SE->getSCEV(DU.NarrowUse->getOperand(ExtendOperIdx)), WideType);
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else
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return nullptr;
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return {nullptr, Unknown};
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// When creating this SCEV expr, don't apply the current operations NSW or NUW
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// flags. This instruction may be guarded by control flow that the no-wrap
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@ -1171,33 +1190,49 @@ const SCEVAddRecExpr* WidenIV::getExtendedOperandRecurrence(NarrowIVDefUse DU) {
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dyn_cast<SCEVAddRecExpr>(getSCEVByOpCode(lhs, rhs, OpCode));
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if (!AddRec || AddRec->getLoop() != L)
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return nullptr;
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return AddRec;
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return {nullptr, Unknown};
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return {AddRec, ExtKind};
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}
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/// Is this instruction potentially interesting for further simplification after
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/// widening it's type? In other words, can the extend be safely hoisted out of
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/// the loop with SCEV reducing the value to a recurrence on the same loop. If
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/// so, return the sign or zero extended recurrence. Otherwise return NULL.
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const SCEVAddRecExpr *WidenIV::getWideRecurrence(Instruction *NarrowUse) {
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if (!SE->isSCEVable(NarrowUse->getType()))
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return nullptr;
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/// so, return the extended recurrence and the kind of extension used. Otherwise
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/// return {nullptr, Unknown}.
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WidenIV::WidenedRecTy WidenIV::getWideRecurrence(NarrowIVDefUse DU) {
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if (!SE->isSCEVable(DU.NarrowUse->getType()))
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return {nullptr, Unknown};
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const SCEV *NarrowExpr = SE->getSCEV(NarrowUse);
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const SCEV *NarrowExpr = SE->getSCEV(DU.NarrowUse);
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if (SE->getTypeSizeInBits(NarrowExpr->getType()) >=
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SE->getTypeSizeInBits(WideType)) {
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// NarrowUse implicitly widens its operand. e.g. a gep with a narrow
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// index. So don't follow this use.
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return nullptr;
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return {nullptr, Unknown};
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}
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const SCEV *WideExpr = IsSigned ?
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SE->getSignExtendExpr(NarrowExpr, WideType) :
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SE->getZeroExtendExpr(NarrowExpr, WideType);
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const SCEV *WideExpr;
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ExtendKind ExtKind;
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if (DU.NeverNegative) {
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WideExpr = SE->getSignExtendExpr(NarrowExpr, WideType);
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if (isa<SCEVAddRecExpr>(WideExpr))
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ExtKind = SignExtended;
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else {
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WideExpr = SE->getZeroExtendExpr(NarrowExpr, WideType);
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ExtKind = ZeroExtended;
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}
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} else if (getExtendKind(DU.NarrowDef) == SignExtended) {
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WideExpr = SE->getSignExtendExpr(NarrowExpr, WideType);
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ExtKind = SignExtended;
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} else {
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WideExpr = SE->getZeroExtendExpr(NarrowExpr, WideType);
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ExtKind = ZeroExtended;
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}
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const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(WideExpr);
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if (!AddRec || AddRec->getLoop() != L)
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return nullptr;
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return AddRec;
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return {nullptr, Unknown};
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return {AddRec, ExtKind};
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}
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/// This IV user cannot be widen. Replace this use of the original narrow IV
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@ -1233,7 +1268,7 @@ bool WidenIV::widenLoopCompare(NarrowIVDefUse DU) {
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//
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// (A) == icmp slt i32 sext(%narrow), sext(%val)
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// == icmp slt i32 zext(%narrow), sext(%val)
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bool IsSigned = getExtendKind(DU.NarrowDef) == SignExtended;
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if (!(DU.NeverNegative || IsSigned == Cmp->isSigned()))
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return false;
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@ -1258,6 +1293,8 @@ bool WidenIV::widenLoopCompare(NarrowIVDefUse DU) {
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/// Determine whether an individual user of the narrow IV can be widened. If so,
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/// return the wide clone of the user.
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Instruction *WidenIV::widenIVUse(NarrowIVDefUse DU, SCEVExpander &Rewriter) {
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assert(ExtendKindMap.count(DU.NarrowDef) &&
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"Should already know the kind of extension used to widen NarrowDef");
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// Stop traversing the def-use chain at inner-loop phis or post-loop phis.
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if (PHINode *UsePhi = dyn_cast<PHINode>(DU.NarrowUse)) {
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@ -1288,8 +1325,19 @@ Instruction *WidenIV::widenIVUse(NarrowIVDefUse DU, SCEVExpander &Rewriter) {
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return nullptr;
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}
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}
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// This narrow use can be widened by a sext if it's non-negative or its narrow
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// def was widended by a sext. Same for zext.
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auto canWidenBySExt = [&]() {
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return DU.NeverNegative || getExtendKind(DU.NarrowDef) == SignExtended;
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};
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auto canWidenByZExt = [&]() {
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return DU.NeverNegative || getExtendKind(DU.NarrowDef) == ZeroExtended;
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};
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// Our raison d'etre! Eliminate sign and zero extension.
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if (IsSigned ? isa<SExtInst>(DU.NarrowUse) : isa<ZExtInst>(DU.NarrowUse)) {
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if ((isa<SExtInst>(DU.NarrowUse) && canWidenBySExt()) ||
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(isa<ZExtInst>(DU.NarrowUse) && canWidenByZExt())) {
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Value *NewDef = DU.WideDef;
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if (DU.NarrowUse->getType() != WideType) {
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unsigned CastWidth = SE->getTypeSizeInBits(DU.NarrowUse->getType());
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@ -1327,11 +1375,12 @@ Instruction *WidenIV::widenIVUse(NarrowIVDefUse DU, SCEVExpander &Rewriter) {
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}
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// Does this user itself evaluate to a recurrence after widening?
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const SCEVAddRecExpr *WideAddRec = getWideRecurrence(DU.NarrowUse);
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if (!WideAddRec)
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WidenedRecTy WideAddRec = getWideRecurrence(DU);
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if (!WideAddRec.first)
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WideAddRec = getExtendedOperandRecurrence(DU);
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if (!WideAddRec) {
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assert((WideAddRec.first == nullptr) == (WideAddRec.second == Unknown));
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if (!WideAddRec.first) {
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// If use is a loop condition, try to promote the condition instead of
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// truncating the IV first.
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if (widenLoopCompare(DU))
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@ -1351,10 +1400,11 @@ Instruction *WidenIV::widenIVUse(NarrowIVDefUse DU, SCEVExpander &Rewriter) {
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// Reuse the IV increment that SCEVExpander created as long as it dominates
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// NarrowUse.
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Instruction *WideUse = nullptr;
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if (WideAddRec == WideIncExpr && Rewriter.hoistIVInc(WideInc, DU.NarrowUse))
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if (WideAddRec.first == WideIncExpr &&
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Rewriter.hoistIVInc(WideInc, DU.NarrowUse))
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WideUse = WideInc;
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else {
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WideUse = cloneIVUser(DU, WideAddRec);
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WideUse = cloneIVUser(DU, WideAddRec.first);
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if (!WideUse)
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return nullptr;
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}
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@ -1363,13 +1413,14 @@ Instruction *WidenIV::widenIVUse(NarrowIVDefUse DU, SCEVExpander &Rewriter) {
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// evaluates to the same expression as the extended narrow use, but doesn't
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// absolutely guarantee it. Hence the following failsafe check. In rare cases
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// where it fails, we simply throw away the newly created wide use.
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if (WideAddRec != SE->getSCEV(WideUse)) {
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if (WideAddRec.first != SE->getSCEV(WideUse)) {
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DEBUG(dbgs() << "Wide use expression mismatch: " << *WideUse
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<< ": " << *SE->getSCEV(WideUse) << " != " << *WideAddRec << "\n");
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<< ": " << *SE->getSCEV(WideUse) << " != " << *WideAddRec.first << "\n");
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DeadInsts.emplace_back(WideUse);
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return nullptr;
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}
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ExtendKindMap[DU.NarrowUse] = WideAddRec.second;
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// Returning WideUse pushes it on the worklist.
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return WideUse;
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}
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@ -1408,9 +1459,9 @@ PHINode *WidenIV::createWideIV(SCEVExpander &Rewriter) {
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return nullptr;
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// Widen the induction variable expression.
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const SCEV *WideIVExpr = IsSigned ?
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SE->getSignExtendExpr(AddRec, WideType) :
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SE->getZeroExtendExpr(AddRec, WideType);
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const SCEV *WideIVExpr = getExtendKind(OrigPhi) == SignExtended
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? SE->getSignExtendExpr(AddRec, WideType)
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: SE->getZeroExtendExpr(AddRec, WideType);
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assert(SE->getEffectiveSCEVType(WideIVExpr->getType()) == WideType &&
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"Expect the new IV expression to preserve its type");
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@ -0,0 +1,270 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -indvars -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-p:64:64:64-n8:16:32:64-S128"
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; When widening IV and its users, trunc and zext/sext are not needed
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; if the original 32-bit user is known to be non-negative, whether
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; the IV is considered signed or unsigned.
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define void @foo(i32* %A, i32* %B, i32* %C, i32 %N) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %N
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; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
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; CHECK: for.body.lr.ph:
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; CHECK-NEXT: br label %for.body
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* %B, i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* %C, i64 [[TMP1]]
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; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
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; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
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; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* %A, i64 [[INDVARS_IV]]
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; CHECK-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX5]], align 4
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; CHECK-NEXT: br label %for.inc
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; CHECK: for.inc:
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; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %N to i64
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
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; CHECK: for.cond.for.end_crit_edge:
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; CHECK-NEXT: br label %for.end
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; CHECK: for.end:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp1 = icmp slt i32 0, %N
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br i1 %cmp1, label %for.body.lr.ph, label %for.end
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for.body.lr.ph: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.lr.ph, %for.inc
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%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
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%idxprom = sext i32 %i.02 to i64
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%arrayidx = getelementptr inbounds i32, i32* %B, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %i.02, 2
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%idxprom1 = zext i32 %add to i64
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %idxprom1
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%1 = load i32, i32* %arrayidx2, align 4
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%add3 = add nsw i32 %0, %1
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%idxprom4 = zext i32 %i.02 to i64
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%arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %idxprom4
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store i32 %add3, i32* %arrayidx5, align 4
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br label %for.inc
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for.inc: ; preds = %for.body
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%inc = add nsw i32 %i.02, 1
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%cmp = icmp slt i32 %inc, %N
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br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
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for.cond.for.end_crit_edge: ; preds = %for.inc
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br label %for.end
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for.end: ; preds = %for.cond.for.end_crit_edge, %entry
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ret void
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}
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|
||||
define void @foo1(i32* %A, i32* %B, i32* %C, i32 %N) {
|
||||
; CHECK-LABEL: @foo1(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %N
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
|
||||
; CHECK: for.body.lr.ph:
|
||||
; CHECK-NEXT: br label %for.body
|
||||
; CHECK: for.body:
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* %B, i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
|
||||
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* %C, i64 [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
|
||||
; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP0]], [[TMP2]]
|
||||
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* %A, i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX5]], align 4
|
||||
; CHECK-NEXT: br label %for.inc
|
||||
; CHECK: for.inc:
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %N to i64
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
|
||||
; CHECK: for.cond.for.end_crit_edge:
|
||||
; CHECK-NEXT: br label %for.end
|
||||
; CHECK: for.end:
|
||||
; CHECK-NEXT: ret void
|
||||
;
|
||||
entry:
|
||||
%cmp1 = icmp slt i32 0, %N
|
||||
br i1 %cmp1, label %for.body.lr.ph, label %for.end
|
||||
|
||||
for.body.lr.ph: ; preds = %entry
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body.lr.ph, %for.inc
|
||||
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
|
||||
%idxprom = zext i32 %i.02 to i64
|
||||
%arrayidx = getelementptr inbounds i32, i32* %B, i64 %idxprom
|
||||
%0 = load i32, i32* %arrayidx, align 4
|
||||
%add = add nsw i32 %i.02, 2
|
||||
%idxprom1 = sext i32 %add to i64
|
||||
%arrayidx2 = getelementptr inbounds i32, i32* %C, i64 %idxprom1
|
||||
%1 = load i32, i32* %arrayidx2, align 4
|
||||
%add3 = add nsw i32 %0, %1
|
||||
%idxprom4 = sext i32 %i.02 to i64
|
||||
%arrayidx5 = getelementptr inbounds i32, i32* %A, i64 %idxprom4
|
||||
store i32 %add3, i32* %arrayidx5, align 4
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %for.body
|
||||
%inc = add nsw i32 %i.02, 1
|
||||
%cmp = icmp slt i32 %inc, %N
|
||||
br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
|
||||
|
||||
for.cond.for.end_crit_edge: ; preds = %for.inc
|
||||
br label %for.end
|
||||
|
||||
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
@a = common global [100 x i32] zeroinitializer, align 16
|
||||
@b = common global [100 x i32] zeroinitializer, align 16
|
||||
|
||||
define i32 @foo2(i32 %M) {
|
||||
; CHECK-LABEL: @foo2(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %M
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
|
||||
; CHECK: for.body.lr.ph:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 %M to i64
|
||||
; CHECK-NEXT: br label %for.body
|
||||
; CHECK: for.body:
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
|
||||
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[TMP3]]
|
||||
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX5]], align 4
|
||||
; CHECK-NEXT: br label %for.inc
|
||||
; CHECK: for.inc:
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %M to i64
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
|
||||
; CHECK: for.cond.for.end_crit_edge:
|
||||
; CHECK-NEXT: br label %for.end
|
||||
; CHECK: for.end:
|
||||
; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
|
||||
; CHECK-NEXT: ret i32 0
|
||||
;
|
||||
entry:
|
||||
%cmp1 = icmp slt i32 0, %M
|
||||
br i1 %cmp1, label %for.body.lr.ph, label %for.end
|
||||
|
||||
for.body.lr.ph: ; preds = %entry
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body.lr.ph, %for.inc
|
||||
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
|
||||
%idxprom = zext i32 %i.02 to i64
|
||||
%arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom
|
||||
%0 = load i32, i32* %arrayidx, align 4
|
||||
%idxprom1 = sext i32 %i.02 to i64
|
||||
%arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 %idxprom1
|
||||
%1 = load i32, i32* %arrayidx2, align 4
|
||||
%add = add nsw i32 %0, %1
|
||||
%add3 = add nsw i32 %i.02, %M
|
||||
%idxprom4 = sext i32 %add3 to i64
|
||||
%arrayidx5 = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom4
|
||||
store i32 %add, i32* %arrayidx5, align 4
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %for.body
|
||||
%inc = add nsw i32 %i.02, 1
|
||||
%cmp = icmp slt i32 %inc, %M
|
||||
br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
|
||||
|
||||
for.cond.for.end_crit_edge: ; preds = %for.inc
|
||||
br label %for.end
|
||||
|
||||
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
|
||||
%call = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
declare i32 @dummy(i32*, i32*)
|
||||
|
||||
; A case where zext should not be eliminated when its operands could only be extended by sext.
|
||||
define i32 @foo3(i32 %M) {
|
||||
; CHECK-LABEL: @foo3(
|
||||
; CHECK-NEXT: entry:
|
||||
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, %M
|
||||
; CHECK-NEXT: br i1 [[CMP1]], label %for.body.lr.ph, label %for.end
|
||||
; CHECK: for.body.lr.ph:
|
||||
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 %M to i64
|
||||
; CHECK-NEXT: br label %for.body
|
||||
; CHECK: for.body:
|
||||
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV:%.*]].next, %for.inc ], [ 0, %for.body.lr.ph ]
|
||||
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
|
||||
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 [[INDVARS_IV]]
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4
|
||||
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i64 [[INDVARS_IV]], [[TMP0]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
|
||||
; CHECK-NEXT: [[IDXPROM4:%.*]] = zext i32 [[TMP4]] to i64
|
||||
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 [[IDXPROM4]]
|
||||
; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX5]], align 4
|
||||
; CHECK-NEXT: br label %for.inc
|
||||
; CHECK: for.inc:
|
||||
; CHECK-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||
; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 %M to i64
|
||||
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
|
||||
; CHECK-NEXT: br i1 [[EXITCOND]], label %for.body, label %for.cond.for.end_crit_edge
|
||||
; CHECK: for.cond.for.end_crit_edge:
|
||||
; CHECK-NEXT: br label %for.end
|
||||
; CHECK: for.end:
|
||||
; CHECK-NEXT: [[CALL:%.*]] = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
|
||||
; CHECK-NEXT: ret i32 0
|
||||
;
|
||||
entry:
|
||||
%cmp1 = icmp slt i32 0, %M
|
||||
br i1 %cmp1, label %for.body.lr.ph, label %for.end
|
||||
|
||||
for.body.lr.ph: ; preds = %entry
|
||||
br label %for.body
|
||||
|
||||
for.body: ; preds = %for.body.lr.ph, %for.inc
|
||||
%i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
|
||||
%idxprom = sext i32 %i.02 to i64
|
||||
%arrayidx = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom
|
||||
%0 = load i32, i32* %arrayidx, align 4
|
||||
%idxprom1 = sext i32 %i.02 to i64
|
||||
%arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* @b, i64 0, i64 %idxprom1
|
||||
%1 = load i32, i32* %arrayidx2, align 4
|
||||
%add = add nsw i32 %0, %1
|
||||
%add3 = add nsw i32 %i.02, %M
|
||||
%idxprom4 = zext i32 %add3 to i64
|
||||
%arrayidx5 = getelementptr inbounds [100 x i32], [100 x i32]* @a, i64 0, i64 %idxprom4
|
||||
store i32 %add, i32* %arrayidx5, align 4
|
||||
br label %for.inc
|
||||
|
||||
for.inc: ; preds = %for.body
|
||||
%inc = add nsw i32 %i.02, 1
|
||||
%cmp = icmp slt i32 %inc, %M
|
||||
br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge
|
||||
|
||||
for.cond.for.end_crit_edge: ; preds = %for.inc
|
||||
br label %for.end
|
||||
|
||||
for.end: ; preds = %for.cond.for.end_crit_edge, %entry
|
||||
%call = call i32 @dummy(i32* getelementptr inbounds ([100 x i32], [100 x i32]* @a, i32 0, i32 0), i32* getelementptr inbounds ([100 x i32], [100 x i32]* @b, i32 0, i32 0))
|
||||
ret i32 0
|
||||
}
|
||||
Loading…
Reference in New Issue