Don't call SimplifyDemandedBits on vectors

llvm-svn: 27128
2006-03-25 22:19:00 +00:00 · 2006-03-25 22:19:00 +00:00 · dc1eab5886
parent b3617beb52
commit dc1eab5886
1 changed files with 2 additions and 1 deletions
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@ -1120,7 +1120,8 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
  }
  // fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
  // fold (and (sra)) -> (and (srl)) when possible.
-  if (SimplifyDemandedBits(SDOperand(N, 0)))
+  if (!MVT::isVector(VT) &&
+      SimplifyDemandedBits(SDOperand(N, 0)))
    return SDOperand();
  // fold (zext_inreg (extload x)) -> (zextload x)
  if (N0.getOpcode() == ISD::EXTLOAD) {