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AMDGPU/GlobalISel: Make i32 mul legal 

llvm-svn: 326471
This commit is contained in:
Matt Arsenault 2018-03-01 19:22:05 +00:00
parent 06cbb27a79
commit dc14ec05d4
2 changed files with 19 additions and 0 deletions
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1
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
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@ -34,6 +34,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo() {
const LLT P2 = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64);
setAction({G_ADD, S32}, Legal);
setAction({G_MUL, S32}, Legal);
setAction({G_AND, S32}, Legal);
setAction({G_OR, S32}, Legal);
setAction({G_XOR, S32}, Legal);

18
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir Normal file
View File

@ -0,0 +1,18 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
---
name: test_mul
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: test_mul
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = G_MUL %0, %1
$vgpr0 = COPY %2
...