forked from OSchip/llvm-project
[X86] Auto-generate complete checks. NFC
llvm-svn: 323724
This commit is contained in:
Craig Topper
parent
ba9838783a
commit
dbf0bc75e4
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck --check-prefix=CHECK-O0 %s
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@ -5,19 +6,33 @@
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; Test how llvm handles return type of {i16, i8}. The return value will be
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; passed in %eax and %dl.
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; CHECK-LABEL: test:
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; CHECK: movl %edi
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; CHECK: callq gen
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; CHECK: movsbl %dl
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; CHECK: addl %{{.*}}, %eax
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; CHECK-O0-LABEL: test
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; CHECK-O0: movl %edi
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; CHECK-O0: callq gen
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; CHECK-O0: movswl %ax
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; CHECK-O0: movsbl %dl
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; CHECK-O0: addl
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; CHECK-O0: movw %{{.*}}, %ax
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define i16 @test(i32 %key) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: callq gen
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; CHECK-NEXT: # kill: def %ax killed %ax def %eax
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; CHECK-NEXT: movsbl %dl, %ecx
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; CHECK-NEXT: addl %ecx, %eax
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; CHECK-NEXT: # kill: def %ax killed %ax killed %eax
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: test:
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; CHECK-O0: # %bb.0: # %entry
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; CHECK-O0-NEXT: pushq %rax
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; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
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; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi
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; CHECK-O0-NEXT: callq gen
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; CHECK-O0-NEXT: movswl %ax, %edi
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; CHECK-O0-NEXT: movsbl %dl, %ecx
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; CHECK-O0-NEXT: addl %ecx, %edi
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; CHECK-O0-NEXT: movw %di, %ax
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; CHECK-O0-NEXT: popq %rcx
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; CHECK-O0-NEXT: retq
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entry:
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%key.addr = alloca i32, align 4
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store i32 %key, i32* %key.addr, align 4
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@ -37,28 +52,42 @@ declare swiftcc { i16, i8 } @gen(i32)
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; If we can't pass every return value in register, we will pass everything
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; in memroy. The caller provides space for the return value and passes
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; the address in %rax. The first input argument will be in %rdi.
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; CHECK-LABEL: test2:
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; CHECK: movq %rsp, %rax
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; CHECK: callq gen2
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; CHECK: movl (%rsp)
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; CHECK-DAG: addl 4(%rsp)
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; CHECK-DAG: addl 8(%rsp)
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; CHECK-DAG: addl 12(%rsp)
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; CHECK-DAG: addl 16(%rsp)
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; CHECK-O0-LABEL: test2:
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; CHECK-O0-DAG: movq %rsp, %rax
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; CHECK-O0: callq gen2
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; CHECK-O0-DAG: movl (%rsp)
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; CHECK-O0-DAG: movl 4(%rsp)
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; CHECK-O0-DAG: movl 8(%rsp)
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; CHECK-O0-DAG: movl 12(%rsp)
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; CHECK-O0-DAG: movl 16(%rsp)
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; CHECK-O0: addl
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; CHECK-O0: addl
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; CHECK-O0: addl
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; CHECK-O0: addl
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; CHECK-O0: movl %{{.*}}, %eax
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define i32 @test2(i32 %key) #0 {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subq $24, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rsp, %rax
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; CHECK-NEXT: callq gen2
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; CHECK-NEXT: movl (%rsp), %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: addl {{[0-9]+}}(%rsp), %eax
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; CHECK-NEXT: addq $24, %rsp
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: test2:
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; CHECK-O0: # %bb.0: # %entry
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; CHECK-O0-NEXT: subq $24, %rsp
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; CHECK-O0-NEXT: .cfi_def_cfa_offset 32
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; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi
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; CHECK-O0-NEXT: movq %rsp, %rax
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; CHECK-O0-NEXT: callq gen2
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %ecx
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edx
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; CHECK-O0-NEXT: movl (%rsp), %esi
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %r8d
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; CHECK-O0-NEXT: addl %r8d, %esi
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; CHECK-O0-NEXT: addl %edx, %esi
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; CHECK-O0-NEXT: addl %ecx, %esi
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; CHECK-O0-NEXT: addl %edi, %esi
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; CHECK-O0-NEXT: movl %esi, %eax
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; CHECK-O0-NEXT: addq $24, %rsp
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; CHECK-O0-NEXT: retq
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entry:
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%key.addr = alloca i32, align 4
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store i32 %key, i32* %key.addr, align 4
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@ -80,19 +109,24 @@ entry:
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; The address of the return value is passed in %rax.
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; On return, we don't keep the address in %rax.
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; CHECK-LABEL: gen2:
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; CHECK: movl %edi, 16(%rax)
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; CHECK: movl %edi, 12(%rax)
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; CHECK: movl %edi, 8(%rax)
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; CHECK: movl %edi, 4(%rax)
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; CHECK: movl %edi, (%rax)
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; CHECK-O0-LABEL: gen2:
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; CHECK-O0-DAG: movl %edi, 16(%rax)
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; CHECK-O0-DAG: movl %edi, 12(%rax)
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; CHECK-O0-DAG: movl %edi, 8(%rax)
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; CHECK-O0-DAG: movl %edi, 4(%rax)
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; CHECK-O0-DAG: movl %edi, (%rax)
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define swiftcc { i32, i32, i32, i32, i32 } @gen2(i32 %key) {
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; CHECK-LABEL: gen2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, 16(%rax)
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; CHECK-NEXT: movl %edi, 12(%rax)
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; CHECK-NEXT: movl %edi, 8(%rax)
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; CHECK-NEXT: movl %edi, 4(%rax)
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; CHECK-NEXT: movl %edi, (%rax)
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: gen2:
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; CHECK-O0: # %bb.0:
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; CHECK-O0-NEXT: movl %edi, 16(%rax)
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; CHECK-O0-NEXT: movl %edi, 12(%rax)
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; CHECK-O0-NEXT: movl %edi, 8(%rax)
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; CHECK-O0-NEXT: movl %edi, 4(%rax)
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; CHECK-O0-NEXT: movl %edi, (%rax)
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; CHECK-O0-NEXT: retq
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%Y = insertvalue { i32, i32, i32, i32, i32 } undef, i32 %key, 0
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%Z = insertvalue { i32, i32, i32, i32, i32 } %Y, i32 %key, 1
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%Z2 = insertvalue { i32, i32, i32, i32, i32 } %Z, i32 %key, 2
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@ -103,17 +137,31 @@ define swiftcc { i32, i32, i32, i32, i32 } @gen2(i32 %key) {
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; The return value {i32, i32, i32, i32} will be returned via registers %eax,
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; %edx, %ecx, %r8d.
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; CHECK-LABEL: test3:
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; CHECK: callq gen3
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; CHECK: addl %edx, %eax
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; CHECK: addl %ecx, %eax
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; CHECK: addl %r8d, %eax
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; CHECK-O0-LABEL: test3:
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; CHECK-O0: callq gen3
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; CHECK-O0: addl %edx, %eax
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; CHECK-O0: addl %ecx, %eax
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; CHECK-O0: addl %r8d, %eax
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define i32 @test3(i32 %key) #0 {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: callq gen3
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: addl %ecx, %eax
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; CHECK-NEXT: addl %r8d, %eax
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; CHECK-NEXT: popq %rcx
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: test3:
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; CHECK-O0: # %bb.0: # %entry
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; CHECK-O0-NEXT: pushq %rax
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; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
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; CHECK-O0-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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; CHECK-O0-NEXT: movl {{[0-9]+}}(%rsp), %edi
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; CHECK-O0-NEXT: callq gen3
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; CHECK-O0-NEXT: addl %edx, %eax
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; CHECK-O0-NEXT: addl %ecx, %eax
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; CHECK-O0-NEXT: addl %r8d, %eax
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; CHECK-O0-NEXT: popq %rcx
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; CHECK-O0-NEXT: retq
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entry:
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%key.addr = alloca i32, align 4
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store i32 %key, i32* %key.addr, align 4
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@ -135,17 +183,31 @@ declare swiftcc { i32, i32, i32, i32 } @gen3(i32 %key)
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; The return value {float, float, float, float} will be returned via registers
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; %xmm0, %xmm1, %xmm2, %xmm3.
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; CHECK-LABEL: test4:
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; CHECK: callq gen4
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; CHECK: addss %xmm1, %xmm0
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; CHECK: addss %xmm2, %xmm0
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; CHECK: addss %xmm3, %xmm0
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; CHECK-O0-LABEL: test4:
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; CHECK-O0: callq gen4
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; CHECK-O0: addss %xmm1, %xmm0
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; CHECK-O0: addss %xmm2, %xmm0
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; CHECK-O0: addss %xmm3, %xmm0
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define float @test4(float %key) #0 {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: movss %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: callq gen4
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; CHECK-NEXT: addss %xmm1, %xmm0
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; CHECK-NEXT: addss %xmm2, %xmm0
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; CHECK-NEXT: addss %xmm3, %xmm0
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: test4:
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; CHECK-O0: # %bb.0: # %entry
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; CHECK-O0-NEXT: pushq %rax
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; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
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; CHECK-O0-NEXT: movss %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-O0-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-O0-NEXT: callq gen4
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; CHECK-O0-NEXT: addss %xmm1, %xmm0
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; CHECK-O0-NEXT: addss %xmm2, %xmm0
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; CHECK-O0-NEXT: addss %xmm3, %xmm0
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; CHECK-O0-NEXT: popq %rax
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; CHECK-O0-NEXT: retq
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entry:
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%key.addr = alloca float, align 4
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store float %key, float* %key.addr, align 4
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@ -165,19 +227,46 @@ entry:
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declare swiftcc { float, float, float, float } @gen4(float %key)
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; CHECK-LABEL: consume_i1_ret:
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; CHECK: callq produce_i1_ret
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; CHECK: andb $1, %al
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; CHECK: andb $1, %dl
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; CHECK: andb $1, %cl
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; CHECK: andb $1, %r8b
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; CHECK-O0-LABEL: consume_i1_ret:
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; CHECK-O0: callq produce_i1_ret
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; CHECK-O0: andb $1, %al
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; CHECK-O0: andb $1, %dl
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; CHECK-O0: andb $1, %cl
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; CHECK-O0: andb $1, %r8b
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define void @consume_i1_ret() {
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; CHECK-LABEL: consume_i1_ret:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq produce_i1_ret
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: movl %eax, {{.*}}(%rip)
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; CHECK-NEXT: andb $1, %dl
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; CHECK-NEXT: movzbl %dl, %eax
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; CHECK-NEXT: movl %eax, {{.*}}(%rip)
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; CHECK-NEXT: andb $1, %cl
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; CHECK-NEXT: movzbl %cl, %eax
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; CHECK-NEXT: movl %eax, {{.*}}(%rip)
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; CHECK-NEXT: andb $1, %r8b
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; CHECK-NEXT: movzbl %r8b, %eax
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; CHECK-NEXT: movl %eax, {{.*}}(%rip)
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: consume_i1_ret:
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; CHECK-O0: # %bb.0:
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; CHECK-O0-NEXT: pushq %rax
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; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
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; CHECK-O0-NEXT: callq produce_i1_ret
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; CHECK-O0-NEXT: andb $1, %al
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; CHECK-O0-NEXT: movzbl %al, %esi
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; CHECK-O0-NEXT: movl %esi, var
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; CHECK-O0-NEXT: andb $1, %dl
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; CHECK-O0-NEXT: movzbl %dl, %esi
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; CHECK-O0-NEXT: movl %esi, var
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; CHECK-O0-NEXT: andb $1, %cl
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; CHECK-O0-NEXT: movzbl %cl, %esi
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; CHECK-O0-NEXT: movl %esi, var
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; CHECK-O0-NEXT: andb $1, %r8b
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; CHECK-O0-NEXT: movzbl %r8b, %esi
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; CHECK-O0-NEXT: movl %esi, var
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; CHECK-O0-NEXT: popq %rax
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; CHECK-O0-NEXT: retq
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%call = call swiftcc { i1, i1, i1, i1 } @produce_i1_ret()
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%v3 = extractvalue { i1, i1, i1, i1 } %call, 0
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%v5 = extractvalue { i1, i1, i1, i1 } %call, 1
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@ -196,21 +285,42 @@ define void @consume_i1_ret() {
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declare swiftcc { i1, i1, i1, i1 } @produce_i1_ret()
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; CHECK-LABEL: foo:
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; CHECK: movq %rdi, (%rax)
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; CHECK-O0-LABEL: foo:
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; CHECK-O0: movq %rdi, (%rax)
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define swiftcc void @foo(i64* sret %agg.result, i64 %val) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq %rdi, (%rax)
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: foo:
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; CHECK-O0: # %bb.0:
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; CHECK-O0-NEXT: movq %rdi, (%rax)
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; CHECK-O0-NEXT: retq
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store i64 %val, i64* %agg.result
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ret void
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}
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; CHECK-LABEL: test5
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; CHECK: callq gen5
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; CHECK: addsd %xmm1, %xmm0
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; CHECK: addsd %xmm2, %xmm0
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; CHECK: addsd %xmm3, %xmm0
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define swiftcc double @test5() #0 {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq gen5
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; CHECK-NEXT: addsd %xmm1, %xmm0
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; CHECK-NEXT: addsd %xmm2, %xmm0
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; CHECK-NEXT: addsd %xmm3, %xmm0
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; CHECK-NEXT: popq %rax
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; CHECK-NEXT: retq
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;
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; CHECK-O0-LABEL: test5:
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; CHECK-O0: # %bb.0: # %entry
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; CHECK-O0-NEXT: pushq %rax
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; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
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; CHECK-O0-NEXT: callq gen5
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; CHECK-O0-NEXT: addsd %xmm1, %xmm0
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; CHECK-O0-NEXT: addsd %xmm2, %xmm0
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; CHECK-O0-NEXT: addsd %xmm3, %xmm0
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; CHECK-O0-NEXT: popq %rax
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; CHECK-O0-NEXT: retq
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entry:
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%call = call swiftcc { double, double, double, double } @gen5()
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@ -228,15 +338,34 @@ entry:
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declare swiftcc { double, double, double, double } @gen5()
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; CHECK-LABEL: test6
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; CHECK: callq gen6
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; CHECK: addsd %xmm1, %xmm0
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; CHECK: addsd %xmm2, %xmm0
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; CHECK: addsd %xmm3, %xmm0
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; CHECK: addq %rdx, %rax
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; CHECK: addq %rcx, %rax
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; CHECK: addq %r8, %rax
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define swiftcc { double, i64 } @test6() #0 {
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; CHECK-LABEL: test6:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rax
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq gen6
|
||||
; CHECK-NEXT: addsd %xmm1, %xmm0
|
||||
; CHECK-NEXT: addsd %xmm2, %xmm0
|
||||
; CHECK-NEXT: addsd %xmm3, %xmm0
|
||||
; CHECK-NEXT: addq %rdx, %rax
|
||||
; CHECK-NEXT: addq %rcx, %rax
|
||||
; CHECK-NEXT: addq %r8, %rax
|
||||
; CHECK-NEXT: popq %rcx
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: test6:
|
||||
; CHECK-O0: # %bb.0: # %entry
|
||||
; CHECK-O0-NEXT: pushq %rax
|
||||
; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-O0-NEXT: callq gen6
|
||||
; CHECK-O0-NEXT: addsd %xmm1, %xmm0
|
||||
; CHECK-O0-NEXT: addsd %xmm2, %xmm0
|
||||
; CHECK-O0-NEXT: addsd %xmm3, %xmm0
|
||||
; CHECK-O0-NEXT: addq %rdx, %rax
|
||||
; CHECK-O0-NEXT: addq %rcx, %rax
|
||||
; CHECK-O0-NEXT: addq %r8, %rax
|
||||
; CHECK-O0-NEXT: popq %rcx
|
||||
; CHECK-O0-NEXT: retq
|
||||
entry:
|
||||
%call = call swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen6()
|
||||
|
||||
|
|
@ -264,13 +393,22 @@ entry:
|
|||
|
||||
declare swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen6()
|
||||
|
||||
; CHECK-LABEL: gen7
|
||||
; CHECK: movl %edi, %eax
|
||||
; CHECK: movl %edi, %edx
|
||||
; CHECK: movl %edi, %ecx
|
||||
; CHECK: movl %edi, %r8d
|
||||
; CHECK: retq
|
||||
define swiftcc { i32, i32, i32, i32 } @gen7(i32 %key) {
|
||||
; CHECK-LABEL: gen7:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: movl %edi, %edx
|
||||
; CHECK-NEXT: movl %edi, %ecx
|
||||
; CHECK-NEXT: movl %edi, %r8d
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: gen7:
|
||||
; CHECK-O0: # %bb.0:
|
||||
; CHECK-O0-NEXT: movl %edi, %eax
|
||||
; CHECK-O0-NEXT: movl %edi, %edx
|
||||
; CHECK-O0-NEXT: movl %edi, %ecx
|
||||
; CHECK-O0-NEXT: movl %edi, %r8d
|
||||
; CHECK-O0-NEXT: retq
|
||||
%v0 = insertvalue { i32, i32, i32, i32 } undef, i32 %key, 0
|
||||
%v1 = insertvalue { i32, i32, i32, i32 } %v0, i32 %key, 1
|
||||
%v2 = insertvalue { i32, i32, i32, i32 } %v1, i32 %key, 2
|
||||
|
|
@ -278,13 +416,22 @@ define swiftcc { i32, i32, i32, i32 } @gen7(i32 %key) {
|
|||
ret { i32, i32, i32, i32 } %v3
|
||||
}
|
||||
|
||||
; CHECK-LABEL: gen8
|
||||
; CHECK: movq %rdi, %rax
|
||||
; CHECK: movq %rdi, %rdx
|
||||
; CHECK: movq %rdi, %rcx
|
||||
; CHECK: movq %rdi, %r8
|
||||
; CHECK: retq
|
||||
define swiftcc { i64, i64, i64, i64 } @gen8(i64 %key) {
|
||||
; CHECK-LABEL: gen8:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: movq %rdi, %rdx
|
||||
; CHECK-NEXT: movq %rdi, %rcx
|
||||
; CHECK-NEXT: movq %rdi, %r8
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: gen8:
|
||||
; CHECK-O0: # %bb.0:
|
||||
; CHECK-O0-NEXT: movq %rdi, %rax
|
||||
; CHECK-O0-NEXT: movq %rdi, %rdx
|
||||
; CHECK-O0-NEXT: movq %rdi, %rcx
|
||||
; CHECK-O0-NEXT: movq %rdi, %r8
|
||||
; CHECK-O0-NEXT: retq
|
||||
%v0 = insertvalue { i64, i64, i64, i64 } undef, i64 %key, 0
|
||||
%v1 = insertvalue { i64, i64, i64, i64 } %v0, i64 %key, 1
|
||||
%v2 = insertvalue { i64, i64, i64, i64 } %v1, i64 %key, 2
|
||||
|
|
@ -292,29 +439,55 @@ define swiftcc { i64, i64, i64, i64 } @gen8(i64 %key) {
|
|||
ret { i64, i64, i64, i64 } %v3
|
||||
}
|
||||
|
||||
; CHECK-LABEL: gen9
|
||||
; CHECK: movl %edi, %eax
|
||||
; CHECK: movl %edi, %edx
|
||||
; CHECK: movl %edi, %ecx
|
||||
; CHECK: movl %edi, %r8d
|
||||
; CHECK: retq
|
||||
define swiftcc { i8, i8, i8, i8 } @gen9(i8 %key) {
|
||||
; CHECK-LABEL: gen9:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: movl %edi, %edx
|
||||
; CHECK-NEXT: movl %edi, %ecx
|
||||
; CHECK-NEXT: movl %edi, %r8d
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: gen9:
|
||||
; CHECK-O0: # %bb.0:
|
||||
; CHECK-O0-NEXT: movb %dil, %al
|
||||
; CHECK-O0-NEXT: movb %al, -{{[0-9]+}}(%rsp) # 1-byte Spill
|
||||
; CHECK-O0-NEXT: movb -{{[0-9]+}}(%rsp), %dl # 1-byte Reload
|
||||
; CHECK-O0-NEXT: movb -{{[0-9]+}}(%rsp), %cl # 1-byte Reload
|
||||
; CHECK-O0-NEXT: movb -{{[0-9]+}}(%rsp), %r8b # 1-byte Reload
|
||||
; CHECK-O0-NEXT: retq
|
||||
%v0 = insertvalue { i8, i8, i8, i8 } undef, i8 %key, 0
|
||||
%v1 = insertvalue { i8, i8, i8, i8 } %v0, i8 %key, 1
|
||||
%v2 = insertvalue { i8, i8, i8, i8 } %v1, i8 %key, 2
|
||||
%v3 = insertvalue { i8, i8, i8, i8 } %v2, i8 %key, 3
|
||||
ret { i8, i8, i8, i8 } %v3
|
||||
}
|
||||
; CHECK-LABEL: gen10
|
||||
; CHECK: movaps %xmm0, %xmm1
|
||||
; CHECK: movaps %xmm0, %xmm2
|
||||
; CHECK: movaps %xmm0, %xmm3
|
||||
; CHECK: movq %rdi, %rax
|
||||
; CHECK: movq %rdi, %rdx
|
||||
; CHECK: movq %rdi, %rcx
|
||||
; CHECK: movq %rdi, %r8
|
||||
; CHECK: retq
|
||||
define swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen10(double %keyd, i64 %keyi) {
|
||||
; CHECK-LABEL: gen10:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: movaps %xmm0, %xmm1
|
||||
; CHECK-NEXT: movaps %xmm0, %xmm2
|
||||
; CHECK-NEXT: movaps %xmm0, %xmm3
|
||||
; CHECK-NEXT: movq %rdi, %rax
|
||||
; CHECK-NEXT: movq %rdi, %rdx
|
||||
; CHECK-NEXT: movq %rdi, %rcx
|
||||
; CHECK-NEXT: movq %rdi, %r8
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: gen10:
|
||||
; CHECK-O0: # %bb.0:
|
||||
; CHECK-O0-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp) # 8-byte Spill
|
||||
; CHECK-O0-NEXT: movsd -{{[0-9]+}}(%rsp), %xmm1 # 8-byte Reload
|
||||
; CHECK-O0-NEXT: # xmm1 = mem[0],zero
|
||||
; CHECK-O0-NEXT: movsd -{{[0-9]+}}(%rsp), %xmm2 # 8-byte Reload
|
||||
; CHECK-O0-NEXT: # xmm2 = mem[0],zero
|
||||
; CHECK-O0-NEXT: movsd -{{[0-9]+}}(%rsp), %xmm3 # 8-byte Reload
|
||||
; CHECK-O0-NEXT: # xmm3 = mem[0],zero
|
||||
; CHECK-O0-NEXT: movq %rdi, %rax
|
||||
; CHECK-O0-NEXT: movq %rdi, %rdx
|
||||
; CHECK-O0-NEXT: movq %rdi, %rcx
|
||||
; CHECK-O0-NEXT: movq %rdi, %r8
|
||||
; CHECK-O0-NEXT: retq
|
||||
%v0 = insertvalue { double, double, double, double, i64, i64, i64, i64 } undef, double %keyd, 0
|
||||
%v1 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v0, double %keyd, 1
|
||||
%v2 = insertvalue { double, double, double, double, i64, i64, i64, i64 } %v1, double %keyd, 2
|
||||
|
|
@ -327,12 +500,28 @@ define swiftcc { double, double, double, double, i64, i64, i64, i64 } @gen10(dou
|
|||
}
|
||||
|
||||
|
||||
; CHECK-LABEL: test11
|
||||
; CHECK: callq gen11
|
||||
; CHECK: addps %xmm1, %xmm0
|
||||
; CHECK: addps %xmm2, %xmm0
|
||||
; CHECK: addps %xmm3, %xmm0
|
||||
define swiftcc <4 x float> @test11() #0 {
|
||||
; CHECK-LABEL: test11:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: pushq %rax
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-NEXT: callq gen11
|
||||
; CHECK-NEXT: addps %xmm1, %xmm0
|
||||
; CHECK-NEXT: addps %xmm2, %xmm0
|
||||
; CHECK-NEXT: addps %xmm3, %xmm0
|
||||
; CHECK-NEXT: popq %rax
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: test11:
|
||||
; CHECK-O0: # %bb.0: # %entry
|
||||
; CHECK-O0-NEXT: pushq %rax
|
||||
; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-O0-NEXT: callq gen11
|
||||
; CHECK-O0-NEXT: addps %xmm1, %xmm0
|
||||
; CHECK-O0-NEXT: addps %xmm2, %xmm0
|
||||
; CHECK-O0-NEXT: addps %xmm3, %xmm0
|
||||
; CHECK-O0-NEXT: popq %rax
|
||||
; CHECK-O0-NEXT: retq
|
||||
entry:
|
||||
%call = call swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @gen11()
|
||||
|
||||
|
|
@ -349,12 +538,28 @@ entry:
|
|||
|
||||
declare swiftcc { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @gen11()
|
||||
|
||||
; CHECK-LABEL: test12
|
||||
; CHECK: callq gen12
|
||||
; CHECK: addps %xmm1, %xmm0
|
||||
; CHECK: addps %xmm2, %xmm0
|
||||
; CHECK: movaps %xmm3, %xmm1
|
||||
define swiftcc { <4 x float>, float } @test12() #0 {
|
||||
; CHECK-LABEL: test12:
|
||||
; CHECK: # %bb.0: # %entry
|
||||
; CHECK-NEXT: pushq %rax
|
||||
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-NEXT: callq gen12
|
||||
; CHECK-NEXT: addps %xmm1, %xmm0
|
||||
; CHECK-NEXT: addps %xmm2, %xmm0
|
||||
; CHECK-NEXT: movaps %xmm3, %xmm1
|
||||
; CHECK-NEXT: popq %rax
|
||||
; CHECK-NEXT: retq
|
||||
;
|
||||
; CHECK-O0-LABEL: test12:
|
||||
; CHECK-O0: # %bb.0: # %entry
|
||||
; CHECK-O0-NEXT: pushq %rax
|
||||
; CHECK-O0-NEXT: .cfi_def_cfa_offset 16
|
||||
; CHECK-O0-NEXT: callq gen12
|
||||
; CHECK-O0-NEXT: addps %xmm1, %xmm0
|
||||
; CHECK-O0-NEXT: addps %xmm2, %xmm0
|
||||
; CHECK-O0-NEXT: movaps %xmm3, %xmm1
|
||||
; CHECK-O0-NEXT: popq %rax
|
||||
; CHECK-O0-NEXT: retq
|
||||
entry:
|
||||
%call = call swiftcc { <4 x float>, <4 x float>, <4 x float>, float } @gen12()
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue