forked from OSchip/llvm-project
[X86] Use VR128X instead of VR128 in EVEX instruction patterns.
llvm-svn: 333464
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aba57bfebd
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dbd371e931
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@ -4201,7 +4201,7 @@ let Predicates = [HasAVX512] in {
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(VMOVSSZrr (v4i32 (AVX512_128_SET0)), VR128X:$src)>;
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def : Pat<(v2f64 (X86vzmovl (v2f64 (scalar_to_vector FR64X:$src)))),
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(VMOVSDZrr (v2f64 (AVX512_128_SET0)),
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(COPY_TO_REGCLASS FR64X:$src, VR128))>;
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(COPY_TO_REGCLASS FR64X:$src, VR128X))>;
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}
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// Move low f32 and clear high bits.
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@ -6700,39 +6700,39 @@ defm VFNMSUB : avx512_fma3s<0xAF, 0xBF, 0x9F, "vfnmsub", X86Fnmsub, X86Fnmsubs1,
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multiclass avx512_scalar_fma_patterns<SDNode Op, string Prefix, string Suffix, SDNode Move,
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ValueType VT, ValueType EltVT, PatLeaf ZeroFP> {
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let Predicates = [HasAVX512] in {
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def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
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(Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src3), (iPTR 0)))))))),
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def : Pat<(VT (Move (VT VR128X:$src1), (VT (scalar_to_vector
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(Op (EltVT (extractelt (VT VR128X:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src1), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src3), (iPTR 0)))))))),
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(!cast<I>(Prefix#"213"#Suffix#"Zr_Int")
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VR128:$src1, VR128:$src2, VR128:$src3)>;
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VR128X:$src1, VR128X:$src2, VR128X:$src3)>;
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def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
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def : Pat<(VT (Move (VT VR128X:$src1), (VT (scalar_to_vector
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(X86selects VK1WM:$mask,
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(Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src3), (iPTR 0)))),
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(EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
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(Op (EltVT (extractelt (VT VR128X:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src1), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src3), (iPTR 0)))),
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(EltVT (extractelt (VT VR128X:$src1), (iPTR 0)))))))),
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(!cast<I>(Prefix#"213"#Suffix#"Zr_Intk")
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VR128:$src1, VK1WM:$mask, VR128:$src2, VR128:$src3)>;
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VR128X:$src1, VK1WM:$mask, VR128X:$src2, VR128X:$src3)>;
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def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
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def : Pat<(VT (Move (VT VR128X:$src1), (VT (scalar_to_vector
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(X86selects VK1WM:$mask,
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(Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src3), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src1), (iPTR 0)))),
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(EltVT (extractelt (VT VR128:$src1), (iPTR 0)))))))),
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(Op (EltVT (extractelt (VT VR128X:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src3), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src1), (iPTR 0)))),
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(EltVT (extractelt (VT VR128X:$src1), (iPTR 0)))))))),
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(!cast<I>(Prefix#"231"#Suffix#"Zr_Intk")
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VR128:$src1, VK1WM:$mask, VR128:$src2, VR128:$src3)>;
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VR128X:$src1, VK1WM:$mask, VR128X:$src2, VR128X:$src3)>;
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def : Pat<(VT (Move (VT VR128:$src1), (VT (scalar_to_vector
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def : Pat<(VT (Move (VT VR128X:$src1), (VT (scalar_to_vector
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(X86selects VK1WM:$mask,
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(Op (EltVT (extractelt (VT VR128:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src1), (iPTR 0))),
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(EltVT (extractelt (VT VR128:$src3), (iPTR 0)))),
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(Op (EltVT (extractelt (VT VR128X:$src2), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src1), (iPTR 0))),
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(EltVT (extractelt (VT VR128X:$src3), (iPTR 0)))),
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(EltVT ZeroFP)))))),
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(!cast<I>(Prefix#"213"#Suffix#"Zr_Intkz")
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VR128:$src1, VK1WM:$mask, VR128:$src2, VR128:$src3)>;
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VR128X:$src1, VK1WM:$mask, VR128X:$src2, VR128X:$src3)>;
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}
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}
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