forked from OSchip/llvm-project
parent
44cb1ffb6a
commit
dbca6d47f3
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@ -35514,7 +35514,7 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG,
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MVT SubVecVT = SubVec.getSimpleValueType();
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MVT SubVecVT = SubVec.getSimpleValueType();
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// If this is an insert of an extract, combine to a shuffle. Don't do this
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// If this is an insert of an extract, combine to a shuffle. Don't do this
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// if the insert or extract can be represented with a subvector operation.
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// if the insert or extract can be represented with a subregister operation.
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if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
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if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
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SubVec.getOperand(0).getSimpleValueType() == OpVT &&
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SubVec.getOperand(0).getSimpleValueType() == OpVT &&
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(IdxVal != 0 || !Vec.isUndef())) {
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(IdxVal != 0 || !Vec.isUndef())) {
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