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fixed to test feature, not CPU 

llvm-svn: 231513
This commit is contained in:
Sanjay Patel 2015-03-06 20:51:25 +00:00
parent 7c6eaf03d7
commit dba8012f69
1 changed files with 1 additions and 1 deletions
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2
llvm/test/CodeGen/X86/fnabs.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx| FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx| FileCheck %s
; Verify that we generate a single OR instruction for a scalar, vec128, and vec256
; FNABS(x) operation -> FNEG (FABS(x)).