forked from OSchip/llvm-project
Fix some broken CHECK lines.
The colon is important. llvm-svn: 292761
This commit is contained in:
Benjamin Kramer
parent
e5f6daa475
commit
db9e0b659d
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@ -3,7 +3,7 @@
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; CHECK: DIVERGENT:
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; CHECK-NOT: %arg0
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; CHECK-NOT: %arg1
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; CHECK-NOT; %arg2
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; CHECK-NOT: %arg2
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; CHECK: <2 x i32> %arg3
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; CHECK: DIVERGENT: <3 x i32> %arg4
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; CHECK: DIVERGENT: float %arg5
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@ -36,13 +36,13 @@ ib: ; preds = %if6
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%r4 = mul i64 %r3, %r0
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%r5 = add i64 %r2, %r4
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%r6 = icmp ult i64 %r5, undef
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; CHECK %2 = mul i64 %lsr.iv, %r3
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; CHECK %3 = add i64 %1, -1
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; CHECK %4 = add i64 %0, %r3
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; CHECK %r6
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; CHECK: %2 = mul i64 %lsr.iv, %r3
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; CHECK: %3 = add i64 %2, -1
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; CHECK: %4 = add i64 %0, %3
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; CHECK: %r6
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%r7 = getelementptr i64, i64* undef, i64 %r5
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store i64 1, i64* %r7, align 8
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; CHECK %5 = mul i64 %lsr.iv, %r3
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; CHECK %6 = add i64 %5, -1
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; CHECK: %5 = mul i64 %lsr.iv, %r3
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; CHECK: %6 = add i64 %5, -1
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br label %L
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}
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@ -57,7 +57,7 @@ body: |
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; CHECK: %0(s32) = G_FCONSTANT float 1.000000e+00
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; CHECK: %1(s64) = G_FCONSTANT double 2.000000e+00
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; CHECK: [[TMP:%[0-9]+]](s32) = G_FCONSTANT half 0xH0000
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; CHECK; %2(s16) = G_FPTRUNC [[TMP]]
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; CHECK: %2(s16) = G_FPTRUNC [[TMP]]
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%0(s32) = G_FCONSTANT float 1.0
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%1(s64) = G_FCONSTANT double 2.0
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@ -236,14 +236,14 @@ define void @test_zero_reg(i32* %addr) {
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define <2 x float> @test_vreg_64bit(<2 x float> %in) nounwind {
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; CHECK-LABEL: test_vreg_64bit:
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%1 = tail call <2 x float> asm sideeffect "fadd ${0}.2s, ${1}.2s, ${1}.2s", "={v14},w"(<2 x float> %in) nounwind
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; CHECK fadd v14.2s, v0.2s, v0.2s:
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; CHECK: fadd v14.2s, v0.2s, v0.2s
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ret <2 x float> %1
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}
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define <4 x float> @test_vreg_128bit(<4 x float> %in) nounwind {
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; CHECK-LABEL: test_vreg_128bit:
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%1 = tail call <4 x float> asm sideeffect "fadd ${0}.4s, ${1}.4s, ${1}.4s", "={v14},w"(<4 x float> %in) nounwind
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; CHECK fadd v14.4s, v0.4s, v0.4s:
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; CHECK: fadd v14.4s, v0.4s, v0.4s
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ret <4 x float> %1
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}
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@ -28,7 +28,7 @@ define i64 @test_chains() {
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; CHECK: ldurb {{w[0-9]+}}, [x29, [[LOCADDR:#-?[0-9]+]]]
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #1
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; CHECK: sturb w[[STRVAL:[0-9]+]], [x29, [[LOCADDR]]]
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; CHECK; and w0, w[[STRVAL]], #0xff
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; CHECK: and w0, w[[STRVAL]], #0xff
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%ret.1 = load i8, i8* %locvar
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%ret.2 = zext i8 %ret.1 to i64
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@ -12,7 +12,7 @@
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; for local memory globals.
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; CHECK-LABEL: lds_no_offset:
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; CHECK ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:4
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; CHECK: ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:4
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define void @lds_no_offset() {
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entry:
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%ptr = getelementptr [4 x i32], [4 x i32] addrspace(3)* @lds, i32 0, i32 1
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@ -2,7 +2,7 @@
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; CHECK-LABEL: @volatile_load(
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; CHECK: alloca [5 x i32]
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; CHECK load volatile i32, i32*
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; CHECK: load volatile i32, i32*
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define void @volatile_load(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
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entry:
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%stack = alloca [5 x i32], align 4
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@ -15,7 +15,7 @@ entry:
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; CHECK-LABEL: @volatile_store(
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; CHECK: alloca [5 x i32]
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; CHECK store volatile i32 %tmp, i32*
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; CHECK: store volatile i32 %tmp, i32*
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define void @volatile_store(i32 addrspace(1)* nocapture %out, i32 addrspace(1)* nocapture %in) {
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entry:
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%stack = alloca [5 x i32], align 4
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@ -38,7 +38,7 @@ entry:
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; PIC: jalrc $25
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%call1 = tail call i32 @i()
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%cmp = icmp eq i32 %call, %call1
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; CHECK beqc
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; CHECK: beqc
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br i1 %cmp, label %if.end, label %if.then
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if.then: ; preds = %entry:
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@ -61,7 +61,7 @@ entry:
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; PIC: jalrc $25
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%call = tail call i32 @k()
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%cmp = icmp slt i32 %call, 0
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; CHECK : bgez
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; CHECK: bgez
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry:
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@ -24,7 +24,7 @@ define float @test_nvvm_sqrt(float %a) {
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; CHECK-LABEL: test_llvm_sqrt(
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define float @test_llvm_sqrt(float %a) {
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; CHECK sqrt.rn.f32
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; CHECK: sqrt.rn.f32
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%val = call float @llvm.sqrt.f32(float %a)
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ret float %val
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}
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@ -403,7 +403,7 @@ entry:
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; CHECK: [[ELSE_LABEL]]
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; CHECK-NEXT: slwi 3, 4, 1
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; DISABLE: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
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; CHECK-NEXT blr
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; CHECK-NEXT: blr
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;
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define i32 @inlineAsm(i32 %cond, i32 %N) {
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entry:
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@ -18,7 +18,7 @@ entry:
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ret <16 x i8> %res
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; CHECK-LABEL: @test_byte
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; CHECK: vabsdub 2, 2, 3
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; CHECK blr
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; CHECK: blr
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}
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define <8 x i16> @test_half(<8 x i16> %a, <8 x i16> %b) {
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@ -27,7 +27,7 @@ entry:
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ret <8 x i16> %res
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; CHECK-LABEL: @test_half
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; CHECK: vabsduh 2, 2, 3
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; CHECK blr
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; CHECK: blr
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}
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define <4 x i32> @test_word(<4 x i32> %a, <4 x i32> %b) {
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@ -277,8 +277,8 @@ entry:
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%0 = tail call <2 x i64> @llvm.ppc.vsx.xvxexpdp(<2 x double> %a)
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ret <2 x i64> %0
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; CHECK-LABEL: testXVXEXPDP
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; CHECK xvxexpdp 34, 34
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; CHECK blr
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; CHECK: xvxexpdp 34, 34
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; CHECK: blr
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}
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; Function Attrs: nounwind readnone
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declare <2 x i64>@llvm.ppc.vsx.xvxexpdp(<2 x double>)
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@ -289,8 +289,8 @@ entry:
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%0 = tail call <4 x i32> @llvm.ppc.vsx.xvxsigsp(<4 x float> %a)
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ret <4 x i32> %0
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; CHECK-LABEL: testXVXSIGSP
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; CHECK xvxsigsp 34, 34
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; CHECK blr
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; CHECK: xvxsigsp 34, 34
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; CHECK: blr
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}
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; Function Attrs: nounwind readnone
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declare <4 x i32> @llvm.ppc.vsx.xvxsigsp(<4 x float>)
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@ -301,8 +301,8 @@ entry:
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%0 = tail call <2 x i64> @llvm.ppc.vsx.xvxsigdp(<2 x double> %a)
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ret <2 x i64> %0
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; CHECK-LABEL: testXVXSIGDP
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; CHECK xvxsigdp 34, 34
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; CHECK blr
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; CHECK: xvxsigdp 34, 34
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; CHECK: blr
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}
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; Function Attrs: nounwind readnone
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declare <2 x i64> @llvm.ppc.vsx.xvxsigdp(<2 x double>)
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@ -13,4 +13,4 @@ define i32 @foo(i32, i32, i32) {
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!0 = !{!"clang version 4.0.0 (trunk 279683)"}
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!1 = !{!"branch_weights", i32 1000, i32 1 }
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; CHECK ![[WT]] = !{!"branch_weights", i32 1000, i32 1 }
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; CHECK: ![[WT]] = !{!"branch_weights", i32 1000, i32 1}
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@ -29,6 +29,6 @@ end:
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; CHECK: [[JUMP_TABLE_BLOCK]]:
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; CHECK: btl
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; CHECK: jae [[UNREACHABLE_BLOCK:[.][A-Za-z0-9_]+]]
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; CHECK [[UNREACHABLE_BLOCK]]:
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; CHECK: [[UNREACHABLE_BLOCK]]:
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; CHECK: .Lfunc_end0
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}
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@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gnu"
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declare void @abort()
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; CHECK-LABEL: @foo(
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; CHECK-NOT return:
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; CHECK-NOT: return:
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define void @foo(i32* %p) {
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entry:
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%p.addr = alloca i32*, align 8
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@ -12,7 +12,7 @@ target triple = "x86_64-apple-macosx"
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; CHECK: popq
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; CHECK-NEXT: retq
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; CHECK: movl $40, %edi
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; CHECK-NEXT callq ___asan_report_load4
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; CHECK-NEXT: callq ___asan_report_load4
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define void @sanitize() #0 {
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entry:
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%tmp = load i8, i8* inttoptr (i64 17592186044421 to i8*)
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@ -39,7 +39,7 @@ define void @test_2() {
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ret void
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; CHECK: tail call void @f() [ "deopt"(i8* %m) ]
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; CHECK-NEXT ret void
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; CHECK-NEXT: ret void
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}
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define i8* @test_3() {
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@ -67,7 +67,7 @@
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fsub v0.2d, v1.2d, v2.2d
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// CHECK: fsub v0.4h, v1.4h, v2.4h // encoding: [0x20,0x14,0xc2,0x0e]
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// CHECK; fsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x14,0xc2,0x4e]
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// CHECK: fsub v0.8h, v1.8h, v2.8h // encoding: [0x20,0x14,0xc2,0x4e]
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// CHECK: fsub v0.2s, v1.2s, v2.2s // encoding: [0x20,0xd4,0xa2,0x0e]
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// CHECK: fsub v0.4s, v1.4s, v2.4s // encoding: [0x20,0xd4,0xa2,0x4e]
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// CHECK: fsub v0.2d, v1.2d, v2.2d // encoding: [0x20,0xd4,0xe2,0x4e]
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@ -37,7 +37,7 @@ f2:
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@ CHECK-ARM moveq r2, #520093696
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@ CHECK-THUMB2 moveq.w r2, #520093696
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ldrne r3, = 0x00001234
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@ CHECK movwne r2, #4660
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@ CHECK: movwne r3, #4660
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@
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@ Constant Pools
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@ -37,7 +37,7 @@ f2:
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@ CHECK-ARM moveq r2, #520093696
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@ CHECK-THUMB2 moveq.w r2, #520093696
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ldrne r3, = 0x00001234
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@ CHECK movwne r2, #4660
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@ CHECK: movwne r3, #4660
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@
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@ Constant Pools
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@ -65,7 +65,7 @@ li $5, 0xc0008000 # CHECK: lui $5, 49152 # encoding: [0x3c,0x05,0xc0,0x00
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# CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00]
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li $5, 0x80008000 # CHECK: lui $5, 32768 # encoding: [0x3c,0x05,0x80,0x00]
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# CHECK: ori $5, $5, 32768 # encoding: [0x34,0xa5,0x80,0x00]
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li $4, ~0xffffffff # CHECK; addiu $4, $zero, 0 # encoding: [0x24,0x04,0x00,0x00]
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li $4, ~0xffffffff # CHECK: addiu $4, $zero, 0 # encoding: [0x24,0x04,0x00,0x00]
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li $4, ~0x80000001 # CHECK: lui $4, 32767 # encoding: [0x3c,0x04,0x7f,0xff]
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# CHECK: ori $4, $4, 65534 # encoding: [0x34,0x84,0xff,0xfe]
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li $4, ~0x80000000 # CHECK: lui $4, 32767 # encoding: [0x3c,0x04,0x7f,0xff]
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@ -100,10 +100,10 @@
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syscall 396 # CHECK: syscall 396 # encoding: [0x01,0x8c,0x8b,0x7c]
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mod $3, $4, $5 # CHECK: mod $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x58]
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modu $3, $4, $5 # CHECK: modu $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xd8]
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mul $3, $4, $5 # CHECK mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
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muh $3, $4, $5 # CHECK muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
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mulu $3, $4, $5 # CHECK mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
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muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
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mul $3, $4, $5 # CHECK: mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
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muh $3, $4, $5 # CHECK: muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
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mulu $3, $4, $5 # CHECK: mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
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muhu $3, $4, $5 # CHECK: muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
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nop # CHECK: nop # encoding: [0x00,0x00,0x00,0x00]
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nor $3, $4, $5 # CHECK: nor $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0xd0]
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or $3, $4, $5 # CHECK: or $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0x90]
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@ -269,14 +269,14 @@ a:
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dneg $10 # CHECK: dneg $10, $10 # encoding: [0x59,0x40,0x51,0x90]
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dnegu $1, $11 # CHECK: dnegu $1, $11 # encoding: [0x59,0x60,0x09,0xd0]
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dnegu $5 # CHECK: dnegu $5, $5 # encoding: [0x58,0xa0,0x29,0xd0]
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mul $3, $4, $5 # CHECK mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
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muh $3, $4, $5 # CHECK muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
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mulu $3, $4, $5 # CHECK mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
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muhu $3, $4, $5 # CHECK muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
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dmul $3, $4, $5 # CHECK dmul $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x18]
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dmuh $3, $4, $5 # CHECK dmuh $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x58]
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dmulu $3, $4, $5 # CHECK dmulu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x98]
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dmuhu $3, $4, $5 # CHECK dmuhu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0xd8]
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mul $3, $4, $5 # CHECK: mul $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x18]
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muh $3, $4, $5 # CHECK: muh $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x58]
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mulu $3, $4, $5 # CHECK: mulu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0x98]
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muhu $3, $4, $5 # CHECK: muhu $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xd8]
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dmul $3, $4, $5 # CHECK: dmul $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x18]
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dmuh $3, $4, $5 # CHECK: dmuh $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x58]
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dmulu $3, $4, $5 # CHECK: dmulu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0x98]
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dmuhu $3, $4, $5 # CHECK: dmuhu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0xd8]
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lwp $16, 8($4) # CHECK: lwp $16, 8($4) # encoding: [0x22,0x04,0x10,0x08]
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swp $16, 8($4) # CHECK: swp $16, 8($4) # encoding: [0x22,0x04,0x90,0x08]
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dsbh $3, $4 # CHECK: dsbh $3, $4 # encoding: [0x58,0x64,0x7b,0x3c]
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@ -5,11 +5,11 @@
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; store to @a[0] from being constant propagated to the load in @foo, but will not
|
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; prevent @a[1] from being removed since it is dead.
|
||||
; CHECK: @a.0 = internal unnamed_addr externally_initialized global i32 undef
|
||||
; CHECK-NOT @a.1
|
||||
; CHECK-NOT: @a.1
|
||||
@a = internal externally_initialized global [2 x i32] undef, align 4
|
||||
; This is the same, but a struct rather than an array.
|
||||
; CHECK: @b.0 = internal unnamed_addr externally_initialized global i32 undef
|
||||
; CHECK-NOT @b.1
|
||||
; CHECK-NOT: @b.1
|
||||
@b = internal externally_initialized global {i32, i32} undef, align 4
|
||||
|
||||
define i32 @foo() {
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ define i32 @no_extern() {
|
|||
}
|
||||
|
||||
define i32 @indirect_call(i32 ()* %f) {
|
||||
; CHECK call i32 %f() [[CONVERGENT_ATTR]]
|
||||
; CHECK: call i32 %f() [[CONVERGENT_ATTR]]
|
||||
%a = call i32 %f() convergent
|
||||
ret i32 %a
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
; RUN: opt -basicaa -loop-idiom < %s -S | FileCheck %s
|
||||
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
|
||||
|
||||
; CHECK @.memset_pattern = private unnamed_addr constant [4 x i32] [i32 2, i32 2, i32 2, i32 2], align 16
|
||||
; CHECK: @.memset_pattern = private unnamed_addr constant [4 x i32] [i32 2, i32 2, i32 2, i32 2], align 16
|
||||
|
||||
target triple = "x86_64-apple-darwin10.0.0"
|
||||
|
||||
|
|
|
|||
|
|
@ -27,8 +27,8 @@ entry:
|
|||
%cmp.i = icmp sgt i32 %i, 2
|
||||
%mul.i = select i1 %cmp.i, i32 1, i32 %i
|
||||
; CHECK: %mul.i = select i1 %cmp.i, i32 1, i32 %i
|
||||
; CHECK-SAME !prof ![[BW:[0-9]+]]
|
||||
; CHECK ![[BW]] = !{!"branch_weights", i32 12, i32 6}
|
||||
; CHECK-SAME: !prof ![[BW:[0-9]+]]
|
||||
; CHECK: ![[BW]] = !{!"branch_weights", i32 12, i32 6}
|
||||
%retval.0.i = mul nsw i32 %mul.i, %i
|
||||
ret i32 %retval.0.i
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ fail: ; preds = %top
|
|||
unreachable
|
||||
|
||||
idxend: ; preds = %top
|
||||
; CHECK-NOT call void @llvm.dbg.value(metadata %foo* %cp,
|
||||
; CHECK-NOT: call void @llvm.dbg.value(metadata %foo* %cp,
|
||||
%0 = load volatile %foo, %foo* %cp, align 8
|
||||
; CHECK: call void @llvm.dbg.value(metadata %foo %0,
|
||||
store volatile %foo %0, %foo* undef, align 8
|
||||
|
|
|
|||
Loading…
Reference in New Issue