forked from OSchip/llvm-project
ARM: remove special cases for Darwin dynamic-no-pic mode.
These are handled almost identically to static mode (and ELF's global address materialisation), except that a symbol may have "$non_lazy_ptr" appended. This can be handled by passing appropriate flags along with the instruction instead of using entirely separate pseudo-instructions. llvm-svn: 195655
This commit is contained in:
Tim Northover
parent
edcf1ff7d1
commit
db962e2c45
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@ -774,8 +774,10 @@ getModifierVariantKind(ARMCP::ARMCPModifier Modifier) {
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llvm_unreachable("Invalid ARMCPModifier!");
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}
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MCSymbol *ARMAsmPrinter::GetARMGVSymbol(const GlobalValue *GV) {
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MCSymbol *ARMAsmPrinter::GetARMGVSymbol(const GlobalValue *GV,
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unsigned char TargetFlags) {
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bool isIndirect = Subtarget->isTargetDarwin() &&
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(TargetFlags & ARMII::MO_NONLAZY) &&
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Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
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if (!isIndirect)
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return getSymbol(GV);
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@ -811,7 +813,11 @@ EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
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MCSym = GetBlockAddressSymbol(BA);
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} else if (ACPV->isGlobalValue()) {
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const GlobalValue *GV = cast<ARMConstantPoolConstant>(ACPV)->getGV();
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MCSym = GetARMGVSymbol(GV);
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// On Darwin, const-pool entries may get the "FOO$non_lazy_ptr" mangling, so
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// flag the global as MO_NONLAZY.
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unsigned char TF = Subtarget->isTargetDarwin() ? ARMII::MO_NONLAZY : 0;
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MCSym = GetARMGVSymbol(GV, TF);
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} else if (ACPV->isMachineBasicBlock()) {
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const MachineBasicBlock *MBB = cast<ARMConstantPoolMBB>(ACPV)->getMBB();
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MCSym = MBB->getSymbol();
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@ -1239,26 +1245,21 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
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unsigned TF = MI->getOperand(1).getTargetFlags();
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bool isPIC = TF == ARMII::MO_LO16_NONLAZY_PIC;
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const GlobalValue *GV = MI->getOperand(1).getGlobal();
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MCSymbol *GVSym = GetARMGVSymbol(GV);
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MCSymbol *GVSym = GetARMGVSymbol(GV, TF);
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const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext);
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if (isPIC) {
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MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(),
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getFunctionNumber(),
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MI->getOperand(2).getImm(), OutContext);
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const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext);
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unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4;
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const MCExpr *PCRelExpr =
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ARMMCExpr::CreateLower16(MCBinaryExpr::CreateSub(GVSymExpr,
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MCBinaryExpr::CreateAdd(LabelSymExpr,
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MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(),
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getFunctionNumber(),
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MI->getOperand(2).getImm(), OutContext);
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const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext);
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unsigned PCAdj = (Opc == ARM::MOVi16_ga_pcrel) ? 8 : 4;
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const MCExpr *PCRelExpr =
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ARMMCExpr::CreateLower16(MCBinaryExpr::CreateSub(GVSymExpr,
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MCBinaryExpr::CreateAdd(LabelSymExpr,
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MCConstantExpr::Create(PCAdj, OutContext),
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OutContext), OutContext), OutContext);
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OutContext), OutContext), OutContext);
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TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr));
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} else {
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const MCExpr *RefExpr= ARMMCExpr::CreateLower16(GVSymExpr, OutContext);
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TmpInst.addOperand(MCOperand::CreateExpr(RefExpr));
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}
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// Add predicate operands.
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TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
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@ -1277,26 +1278,21 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
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unsigned TF = MI->getOperand(2).getTargetFlags();
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bool isPIC = TF == ARMII::MO_HI16_NONLAZY_PIC;
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const GlobalValue *GV = MI->getOperand(2).getGlobal();
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MCSymbol *GVSym = GetARMGVSymbol(GV);
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MCSymbol *GVSym = GetARMGVSymbol(GV, TF);
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const MCExpr *GVSymExpr = MCSymbolRefExpr::Create(GVSym, OutContext);
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if (isPIC) {
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MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(),
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getFunctionNumber(),
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MI->getOperand(3).getImm(), OutContext);
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const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext);
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unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4;
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const MCExpr *PCRelExpr =
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MCSymbol *LabelSym = getPICLabel(MAI->getPrivateGlobalPrefix(),
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getFunctionNumber(),
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MI->getOperand(3).getImm(), OutContext);
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const MCExpr *LabelSymExpr= MCSymbolRefExpr::Create(LabelSym, OutContext);
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unsigned PCAdj = (Opc == ARM::MOVTi16_ga_pcrel) ? 8 : 4;
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const MCExpr *PCRelExpr =
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ARMMCExpr::CreateUpper16(MCBinaryExpr::CreateSub(GVSymExpr,
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MCBinaryExpr::CreateAdd(LabelSymExpr,
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MCConstantExpr::Create(PCAdj, OutContext),
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OutContext), OutContext), OutContext);
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TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr));
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} else {
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const MCExpr *RefExpr= ARMMCExpr::CreateUpper16(GVSymExpr, OutContext);
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TmpInst.addOperand(MCOperand::CreateExpr(RefExpr));
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}
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// Add predicate operands.
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TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
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TmpInst.addOperand(MCOperand::CreateReg(0));
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@ -115,7 +115,7 @@ private:
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MCSymbol *GetARMSJLJEHLabel() const;
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MCSymbol *GetARMGVSymbol(const GlobalValue *GV);
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MCSymbol *GetARMGVSymbol(const GlobalValue *GV, unsigned char TargetFlags);
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public:
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/// EmitMachineConstantPoolValue - Print a machine constantpool value to
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@ -1325,10 +1325,8 @@ bool ARMBaseInstrInfo::produceSameValue(const MachineInstr *MI0,
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Opcode == ARM::t2LDRpci_pic ||
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Opcode == ARM::tLDRpci ||
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Opcode == ARM::tLDRpci_pic ||
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Opcode == ARM::MOV_ga_dyn ||
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Opcode == ARM::MOV_ga_pcrel ||
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Opcode == ARM::MOV_ga_pcrel_ldr ||
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Opcode == ARM::t2MOV_ga_dyn ||
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Opcode == ARM::t2MOV_ga_pcrel) {
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if (MI1->getOpcode() != Opcode)
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return false;
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@ -1340,10 +1338,8 @@ bool ARMBaseInstrInfo::produceSameValue(const MachineInstr *MI0,
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if (MO0.getOffset() != MO1.getOffset())
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return false;
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if (Opcode == ARM::MOV_ga_dyn ||
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Opcode == ARM::MOV_ga_pcrel ||
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if (Opcode == ARM::MOV_ga_pcrel ||
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Opcode == ARM::MOV_ga_pcrel_ldr ||
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Opcode == ARM::t2MOV_ga_dyn ||
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Opcode == ARM::t2MOV_ga_pcrel)
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// Ignore the PC labels.
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return MO0.getGlobal() == MO1.getGlobal();
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@ -898,10 +898,8 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
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return true;
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}
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case ARM::MOV_ga_dyn:
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case ARM::MOV_ga_pcrel:
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case ARM::MOV_ga_pcrel_ldr:
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case ARM::t2MOV_ga_dyn:
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case ARM::t2MOV_ga_pcrel: {
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// Expand into movw + movw. Also "add pc" / ldr [pc] in PIC mode.
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unsigned LabelId = AFI->createPICLabelUId();
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@ -910,14 +908,11 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
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const MachineOperand &MO1 = MI.getOperand(1);
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const GlobalValue *GV = MO1.getGlobal();
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unsigned TF = MO1.getTargetFlags();
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bool isARM = (Opcode != ARM::t2MOV_ga_pcrel && Opcode!=ARM::t2MOV_ga_dyn);
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bool isPIC = (Opcode != ARM::MOV_ga_dyn && Opcode != ARM::t2MOV_ga_dyn);
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bool isARM = Opcode != ARM::t2MOV_ga_pcrel;
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unsigned LO16Opc = isARM ? ARM::MOVi16_ga_pcrel : ARM::t2MOVi16_ga_pcrel;
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unsigned HI16Opc = isARM ? ARM::MOVTi16_ga_pcrel :ARM::t2MOVTi16_ga_pcrel;
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unsigned LO16TF = isPIC
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? ARMII::MO_LO16_NONLAZY_PIC : ARMII::MO_LO16_NONLAZY;
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unsigned HI16TF = isPIC
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? ARMII::MO_HI16_NONLAZY_PIC : ARMII::MO_HI16_NONLAZY;
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unsigned LO16TF = TF | ARMII::MO_LO16;
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unsigned HI16TF = TF | ARMII::MO_HI16;
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unsigned PICAddOpc = isARM
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? (Opcode == ARM::MOV_ga_pcrel_ldr ? ARM::PICLDR : ARM::PICADD)
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: ARM::tPICADD;
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@ -925,16 +920,11 @@ bool ARMExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
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TII->get(LO16Opc), DstReg)
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.addGlobalAddress(GV, MO1.getOffset(), TF | LO16TF)
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.addImm(LabelId);
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MachineInstrBuilder MIB2 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
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TII->get(HI16Opc), DstReg)
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BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc), DstReg)
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.addReg(DstReg)
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.addGlobalAddress(GV, MO1.getOffset(), TF | HI16TF)
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.addImm(LabelId);
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if (!isPIC) {
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TransferImpOps(MI, MIB1, MIB2);
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MI.eraseFromParent();
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return true;
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}
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MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(),
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TII->get(PICAddOpc))
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@ -685,19 +685,20 @@ unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, MVT VT) {
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if (Subtarget->useMovt() &&
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Subtarget->isTargetDarwin() == (RelocM != Reloc::Static)) {
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unsigned Opc;
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unsigned char TF = 0;
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if (Subtarget->isTargetDarwin() && RelocM != Reloc::Static)
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TF = ARMII::MO_NONLAZY;
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switch (RelocM) {
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case Reloc::PIC_:
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Opc = isThumb2 ? ARM::t2MOV_ga_pcrel : ARM::MOV_ga_pcrel;
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break;
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case Reloc::DynamicNoPIC:
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Opc = isThumb2 ? ARM::t2MOV_ga_dyn : ARM::MOV_ga_dyn;
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break;
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default:
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Opc = isThumb2 ? ARM::t2MOVi32imm : ARM::MOVi32imm;
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break;
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}
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc),
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DestReg).addGlobalAddress(GV));
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DestReg).addGlobalAddress(GV, 0, TF));
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} else {
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// MachineConstantPool wants an explicit alignment.
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unsigned Align = TD.getPrefTypeAlignment(GV->getType());
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@ -1009,7 +1009,6 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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switch (Opcode) {
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default: return 0;
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case ARMISD::Wrapper: return "ARMISD::Wrapper";
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case ARMISD::WrapperDYN: return "ARMISD::WrapperDYN";
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case ARMISD::WrapperPIC: return "ARMISD::WrapperPIC";
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case ARMISD::WrapperJT: return "ARMISD::WrapperJT";
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case ARMISD::CALL: return "ARMISD::CALL";
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@ -2548,10 +2547,12 @@ SDValue ARMTargetLowering::LowerGlobalAddressDarwin(SDValue Op,
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return DAG.getNode(ARMISD::Wrapper, dl, PtrVT,
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DAG.getTargetGlobalAddress(GV, dl, PtrVT));
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unsigned Wrapper = (RelocM == Reloc::PIC_)
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? ARMISD::WrapperPIC : ARMISD::WrapperDYN;
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SDValue Result = DAG.getNode(Wrapper, dl, PtrVT,
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DAG.getTargetGlobalAddress(GV, dl, PtrVT));
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unsigned Wrapper =
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RelocM == Reloc::PIC_ ? ARMISD::WrapperPIC : ARMISD::Wrapper;
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SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, ARMII::MO_NONLAZY);
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SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G);
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if (Subtarget->GVIsIndirectSymbol(GV, RelocM))
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Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result,
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MachinePointerInfo::getGOT(),
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@ -35,8 +35,6 @@ namespace llvm {
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Wrapper, // Wrapper - A wrapper node for TargetConstantPool,
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// TargetExternalSymbol, and TargetGlobalAddress.
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WrapperDYN, // WrapperDYN - A wrapper node for TargetGlobalAddress in
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// DYN mode.
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WrapperPIC, // WrapperPIC - A wrapper node for TargetGlobalAddress in
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// PIC mode.
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WrapperJT, // WrapperJT - A wrapper node for TargetJumpTable
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@ -95,7 +95,6 @@ def ARMSmlal : SDNode<"ARMISD::SMLAL", SDT_ARM64bitmlal>;
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// Node definitions.
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def ARMWrapper : SDNode<"ARMISD::Wrapper", SDTIntUnaryOp>;
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def ARMWrapperDYN : SDNode<"ARMISD::WrapperDYN", SDTIntUnaryOp>;
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def ARMWrapperPIC : SDNode<"ARMISD::WrapperPIC", SDTIntUnaryOp>;
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def ARMWrapperJT : SDNode<"ARMISD::WrapperJT", SDTIntBinOp>;
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@ -5193,11 +5192,6 @@ def MOV_ga_pcrel : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
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[(set GPR:$dst, (ARMWrapperPIC tglobaladdr:$addr))]>,
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Requires<[IsARM, UseMovt]>;
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def MOV_ga_dyn : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
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IIC_iMOVix2,
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[(set GPR:$dst, (ARMWrapperDYN tglobaladdr:$addr))]>,
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Requires<[IsARM, UseMovt]>;
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let AddedComplexity = 10 in
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def MOV_ga_pcrel_ldr : PseudoInst<(outs GPR:$dst), (ins i32imm:$addr),
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IIC_iMOVix2ld,
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@ -3793,10 +3793,6 @@ def t2MOV_ga_pcrel : PseudoInst<(outs rGPR:$dst), (ins i32imm:$addr),
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[(set rGPR:$dst, (ARMWrapperPIC tglobaladdr:$addr))]>,
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Requires<[IsThumb2, UseMovt]>;
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def t2MOV_ga_dyn : PseudoInst<(outs rGPR:$dst), (ins i32imm:$addr),
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IIC_iMOVix2,
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[(set rGPR:$dst, (ARMWrapperDYN tglobaladdr:$addr))]>,
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Requires<[IsThumb2, UseMovt]>;
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}
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// ConstantPool, GlobalAddress, and JumpTable
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@ -26,11 +26,12 @@ using namespace llvm;
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MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
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const MCSymbol *Symbol) {
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const MCExpr *Expr;
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switch (MO.getTargetFlags()) {
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unsigned Option = MO.getTargetFlags() & ARMII::MO_OPTION_MASK;
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switch (Option) {
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default: {
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Expr = MCSymbolRefExpr::Create(Symbol, MCSymbolRefExpr::VK_None,
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OutContext);
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switch (MO.getTargetFlags()) {
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switch (Option) {
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default: llvm_unreachable("Unknown target flag on symbol operand");
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case 0:
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break;
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@ -81,9 +82,11 @@ bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
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MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
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MO.getMBB()->getSymbol(), OutContext));
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break;
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case MachineOperand::MO_GlobalAddress:
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MCOp = GetSymbolRef(MO, getSymbol(MO.getGlobal()));
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case MachineOperand::MO_GlobalAddress: {
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MCOp = GetSymbolRef(MO,
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GetARMGVSymbol(MO.getGlobal(), MO.getTargetFlags()));
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break;
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}
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case MachineOperand::MO_ExternalSymbol:
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MCOp = GetSymbolRef(MO,
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GetExternalSymbolSymbol(MO.getSymbolName()));
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@ -278,42 +278,36 @@ namespace ARMII {
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//===------------------------------------------------------------------===//
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// ARM Specific MachineOperand flags.
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MO_NO_FLAG,
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MO_NO_FLAG = 0,
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/// MO_LO16 - On a symbol operand, this represents a relocation containing
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/// lower 16 bit of the address. Used only via movw instruction.
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MO_LO16,
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MO_LO16 = 0x1,
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/// MO_HI16 - On a symbol operand, this represents a relocation containing
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/// higher 16 bit of the address. Used only via movt instruction.
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MO_HI16,
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/// MO_LO16_NONLAZY - On a symbol operand "FOO", this represents a
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/// relocation containing lower 16 bit of the non-lazy-ptr indirect symbol,
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/// i.e. "FOO$non_lazy_ptr".
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/// Used only via movw instruction.
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MO_LO16_NONLAZY,
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/// MO_HI16_NONLAZY - On a symbol operand "FOO", this represents a
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/// relocation containing lower 16 bit of the non-lazy-ptr indirect symbol,
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/// i.e. "FOO$non_lazy_ptr". Used only via movt instruction.
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MO_HI16_NONLAZY,
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/// MO_LO16_NONLAZY_PIC - On a symbol operand "FOO", this represents a
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/// relocation containing lower 16 bit of the PC relative address of the
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/// non-lazy-ptr indirect symbol, i.e. "FOO$non_lazy_ptr - LABEL".
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/// Used only via movw instruction.
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MO_LO16_NONLAZY_PIC,
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/// MO_HI16_NONLAZY_PIC - On a symbol operand "FOO", this represents a
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/// relocation containing lower 16 bit of the PC relative address of the
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/// non-lazy-ptr indirect symbol, i.e. "FOO$non_lazy_ptr - LABEL".
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/// Used only via movt instruction.
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MO_HI16_NONLAZY_PIC,
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MO_HI16 = 0x2,
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/// MO_PLT - On a symbol operand, this represents an ELF PLT reference on a
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/// call operand.
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MO_PLT
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MO_PLT = 0x3,
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/// MO_OPTION_MASK - Most flags are mutually exclusive; this mask selects
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/// just that part of the flag set.
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MO_OPTION_MASK = 0x7f,
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/// MO_NONLAZY - This is an independent flag, on a symbol operand "FOO" it
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/// represents a symbol which, if indirect, will get special Darwin mangling
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/// as a non-lazy-ptr indirect symbol (i.e. "L_FOO$non_lazy_ptr"). Can be
|
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/// combined with MO_LO16, MO_HI16 or MO_NO_FLAG (in a constant-pool, for
|
||||
/// example).
|
||||
MO_NONLAZY = 0x80,
|
||||
|
||||
// It's undefined behaviour if an enum overflows the range between its
|
||||
// smallest and largest values, but since these are |ed together, it can
|
||||
// happen. Put a sentinel in (values of this enum are stored as "unsigned
|
||||
// char").
|
||||
MO_UNUSED_MAXIMUM = 0xff
|
||||
};
|
||||
|
||||
enum {
|
||||
|
|
|
|||
Loading…
Reference in New Issue