forked from OSchip/llvm-project
[AArch64] ldr= pseudo-instruction silently ignored if register invalid
The AArch64 assembler was silently ignoring instructions like this: ldr foo, =bar AArch64AsmParser::parseOperand was returning true as the parse failed, but was not calling AArch64AsmParser::Error to report this to the user, so the instruction was ignored without printing an error message. Differential Revision: http://reviews.llvm.org/D14651 llvm-svn: 253193
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@ -3178,7 +3178,7 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode,
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if (Operands.size() < 2 ||
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!static_cast<AArch64Operand &>(*Operands[1]).isReg())
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return true;
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return Error(Loc, "Only valid when first operand is register");
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bool IsXReg =
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AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains(
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@ -12,3 +12,21 @@ f2:
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// CHECK-ERROR: error: Immediate too large for register
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// CHECK-ERROR: ldr w0, =-0x80000001
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// CHECK-ERROR: ^
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f3:
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ldr foo, =1
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// CHECK-ERROR: error: Only valid when first operand is register
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// CHECK-ERROR: ldr foo, =1
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// CHECK-ERROR: ^
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f4:
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add r0, r0, =1
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// CHECK-ERROR: error: unexpected token in operand
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// CHECK-ERROR: add r0, r0, =1
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// CHECK-ERROR: ^
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f5:
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ldr x0, =())
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// CHECK-ERROR: error: unknown token in expression
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// CHECK-ERROR: ldr x0, =())
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// CHECK-ERROR: ^
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