forked from OSchip/llvm-project
AArch64: look up EmitAArch64Scalar support before calling.
This fixes one immediate bug where an expression with side-effects could be emitted twice during a NEON call. It also prepares the way for folding CodeGen for many of the SISD intrinsics into a table, reducing code size and hopefully increasing performance eventually ("binary search + few switch cases" should be better than "lots of switch cases"). llvm-svn: 201667
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@ -0,0 +1,14 @@
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// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \
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// RUN: -emit-llvm -O0 -o - %s | FileCheck %s
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#include <arm_neon.h>
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void *foo(void);
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float32x2_t bar(void) {
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// CHECK-LABEL: @bar
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return vld1_f32(foo());
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// CHECK: call i8* @foo
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// CHECK-NOT: call i8* @foo
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// CHECK: call <2 x float> @llvm.arm.neon.vld1
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}
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@ -3165,10 +3165,10 @@ NeonEmitter::genOverloadTypeCheckCode(raw_ostream &OS) {
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/// declaration of builtins, checking for unique builtin declarations.
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void NeonEmitter::genBuiltinsDef(raw_ostream &OS) {
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std::vector<Record *> RV = Records.getAllDerivedDefinitions("Inst");
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StringMap<OpKind> EmittedMap;
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// Generate BuiltinsNEON.
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OS << "#ifdef GET_NEON_BUILTINS\n";
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// We want to emit the intrinsics in alphabetical order, so use the more
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// expensive std::map to gather them together first.
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std::map<std::string, OpKind> EmittedMap;
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for (unsigned i = 0, e = RV.size(); i != e; ++i) {
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Record *R = RV[i];
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@ -3203,9 +3203,17 @@ void NeonEmitter::genBuiltinsDef(raw_ostream &OS) {
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continue;
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EmittedMap[bd] = OpNone;
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OS << bd << "\n";
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}
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}
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// Generate BuiltinsNEON.
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OS << "#ifdef GET_NEON_BUILTINS\n";
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for (std::map<std::string, OpKind>::iterator I = EmittedMap.begin(),
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E = EmittedMap.end();
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I != E; ++I)
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OS << I->first << "\n";
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OS << "#endif\n\n";
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}
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