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[X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT 

Noticed by inspection, we shouldn't use FloatDomain directly, we've already bitcast both inputs to MaskVT so select the opcode using that.
This commit is contained in:
Simon Pilgrim 2020-02-24 18:24:31 +00:00
parent d1af6011e5
commit daac8dba77
1 changed files with 1 additions and 1 deletions
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2
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -34133,7 +34133,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
SDValue BitMask = getConstVector(EltBits, UndefElts, MaskVT, DAG, DL); SDValue BitMask = getConstVector(EltBits, UndefElts, MaskVT, DAG, DL);
Res = DAG.getBitcast(MaskVT, V1); Res = DAG.getBitcast(MaskVT, V1);
unsigned AndOpcode = unsigned AndOpcode =
FloatDomain ? unsigned(X86ISD::FAND) : unsigned(ISD::AND); MaskVT.isFloatingPoint() ? unsigned(X86ISD::FAND) : unsigned(ISD::AND);
Res = DAG.getNode(AndOpcode, DL, MaskVT, Res, BitMask); Res = DAG.getNode(AndOpcode, DL, MaskVT, Res, BitMask);
return DAG.getBitcast(RootVT, Res); return DAG.getBitcast(RootVT, Res);
} }