forked from OSchip/llvm-project
AMDGPU: Cleanup fmin/fmax legacy function
Use a more specific subtarget check and combine hasOneUse checks llvm-svn: 293726
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@ -972,14 +972,11 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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}
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/// \brief Generate Min/Max node
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SDValue AMDGPUTargetLowering::CombineFMinMaxLegacy(const SDLoc &DL, EVT VT,
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SDValue AMDGPUTargetLowering::combineFMinMaxLegacy(const SDLoc &DL, EVT VT,
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SDValue LHS, SDValue RHS,
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SDValue True, SDValue False,
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SDValue CC,
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DAGCombinerInfo &DCI) const {
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if (Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS)
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return SDValue();
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if (!(LHS == True && RHS == False) && !(LHS == False && RHS == True))
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return SDValue();
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@ -2830,14 +2827,14 @@ SDValue AMDGPUTargetLowering::performSelectCombine(SDNode *N,
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SDValue NewCond = DAG.getSetCC(SL, Cond.getValueType(), LHS, RHS, NewCC);
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return DAG.getNode(ISD::SELECT, SL, VT, NewCond, False, True);
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}
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}
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if (VT == MVT::f32 && Cond.hasOneUse()) {
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SDValue MinMax
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= CombineFMinMaxLegacy(SDLoc(N), VT, LHS, RHS, True, False, CC, DCI);
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// Revisit this node so we can catch min3/max3/med3 patterns.
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//DCI.AddToWorklist(MinMax.getNode());
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return MinMax;
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if (VT == MVT::f32 && Subtarget->hasFminFmaxLegacy()) {
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SDValue MinMax
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= combineFMinMaxLegacy(SDLoc(N), VT, LHS, RHS, True, False, CC, DCI);
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// Revisit this node so we can catch min3/max3/med3 patterns.
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//DCI.AddToWorklist(MinMax.getNode());
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return MinMax;
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}
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}
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// There's no reason to not do this if the condition has other uses.
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@ -174,7 +174,7 @@ public:
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SmallVectorImpl<SDValue> &Results,
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SelectionDAG &DAG) const override;
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SDValue CombineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS,
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SDValue combineFMinMaxLegacy(const SDLoc &DL, EVT VT, SDValue LHS,
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SDValue RHS, SDValue True, SDValue False,
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SDValue CC, DAGCombinerInfo &DCI) const;
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@ -329,6 +329,10 @@ public:
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return isAmdHsaOS() || isMesaKernel(MF);
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}
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bool hasFminFmaxLegacy() const {
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return getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS;
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}
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/// \brief Returns the offset in bytes from the start of the input buffer
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/// of the first explicit kernel argument.
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unsigned getExplicitKernelArgOffset(const MachineFunction &MF) const {
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@ -916,7 +916,7 @@ SDValue R600TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
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if (VT == MVT::f32) {
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DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr);
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SDValue MinMax = CombineFMinMaxLegacy(DL, VT, LHS, RHS, True, False, CC, DCI);
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SDValue MinMax = combineFMinMaxLegacy(DL, VT, LHS, RHS, True, False, CC, DCI);
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if (MinMax)
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return MinMax;
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}
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