forked from OSchip/llvm-project
[InstCombine] add tests to show size-increasing select transforms
llvm-svn: 286619
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@ -1,6 +1,52 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; FIXME: We should not grow the size of the select in the next 4 cases.
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define i64 @sel_sext(i32 %a, i1 %cmp) {
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; CHECK-LABEL: @sel_sext(
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; CHECK-NEXT: [[TMP1:%.*]] = sext i32 %a to i64
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; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42
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; CHECK-NEXT: ret i64 [[EXT]]
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;
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%sel = select i1 %cmp, i32 %a, i32 42
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%ext = sext i32 %sel to i64
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ret i64 %ext
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}
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define <4 x i64> @sel_sext_vec(<4 x i32> %a, <4 x i1> %cmp) {
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; CHECK-LABEL: @sel_sext_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = sext <4 x i32> %a to <4 x i64>
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; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> %cmp, <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
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; CHECK-NEXT: ret <4 x i64> [[EXT]]
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;
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%sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> <i32 42, i32 42, i32 42, i32 42>
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%ext = sext <4 x i32> %sel to <4 x i64>
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ret <4 x i64> %ext
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}
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define i64 @sel_zext(i32 %a, i1 %cmp) {
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; CHECK-LABEL: @sel_zext(
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; CHECK-NEXT: [[TMP1:%.*]] = zext i32 %a to i64
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; CHECK-NEXT: [[EXT:%.*]] = select i1 %cmp, i64 [[TMP1]], i64 42
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; CHECK-NEXT: ret i64 [[EXT]]
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;
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%sel = select i1 %cmp, i32 %a, i32 42
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%ext = zext i32 %sel to i64
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ret i64 %ext
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}
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define <4 x i64> @sel_zext_vec(<4 x i32> %a, <4 x i1> %cmp) {
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; CHECK-LABEL: @sel_zext_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i32> %a to <4 x i64>
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; CHECK-NEXT: [[EXT:%.*]] = select <4 x i1> %cmp, <4 x i64> [[TMP1]], <4 x i64> <i64 42, i64 42, i64 42, i64 42>
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; CHECK-NEXT: ret <4 x i64> [[EXT]]
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;
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%sel = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> <i32 42, i32 42, i32 42, i32 42>
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%ext = zext <4 x i32> %sel to <4 x i64>
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ret <4 x i64> %ext
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}
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define i32 @test_sext1(i1 %cca, i1 %ccb) {
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; CHECK-LABEL: @test_sext1(
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; CHECK-NEXT: [[FOLD_R:%.*]] = and i1 %ccb, %cca
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