diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
index 95bbaff28b98..494b0e6cbac6 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
@@ -864,16 +864,16 @@ bool HexagonMCInstrInfo::isVector(MCInstrInfo const &MCII, MCInst const &MCI) {
 }
 
 int64_t HexagonMCInstrInfo::minConstant(MCInst const &MCI, size_t Index) {
-  auto Sentinal = static_cast<int64_t>(std::numeric_limits<uint32_t>::max())
+  auto Sentinel = static_cast<int64_t>(std::numeric_limits<uint32_t>::max())
                   << 8;
   if (MCI.size() <= Index)
-    return Sentinal;
+    return Sentinel;
   MCOperand const &MCO = MCI.getOperand(Index);
   if (!MCO.isExpr())
-    return Sentinal;
+    return Sentinel;
   int64_t Value;
   if (!MCO.getExpr()->evaluateAsAbsolute(Value))
-    return Sentinal;
+    return Sentinel;
   return Value;
 }
 
@@ -922,10 +922,7 @@ void HexagonMCInstrInfo::padEndloop(MCInst &MCB, MCContext &Context) {
   MCInst Nop;
   Nop.setOpcode(Hexagon::A2_nop);
   assert(isBundle(MCB));
-  while ((HexagonMCInstrInfo::isInnerLoop(MCB) &&
-          (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_INNER_SIZE)) ||
-         ((HexagonMCInstrInfo::isOuterLoop(MCB) &&
-           (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_OUTER_SIZE))))
+  while (LoopNeedsPadding(MCB))
     MCB.addOperand(MCOperand::createInst(new (Context) MCInst(Nop)));
 }
 
@@ -1038,6 +1035,14 @@ unsigned HexagonMCInstrInfo::SubregisterBit(unsigned Consumer,
   return 0;
 }
 
+bool HexagonMCInstrInfo::LoopNeedsPadding(MCInst const &MCB) {
+  return (
+      (HexagonMCInstrInfo::isInnerLoop(MCB) &&
+       (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_INNER_SIZE)) ||
+      ((HexagonMCInstrInfo::isOuterLoop(MCB) &&
+        (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_OUTER_SIZE))));
+}
+
 bool HexagonMCInstrInfo::IsABranchingInst(MCInstrInfo const &MCII,
                                           MCSubtargetInfo const &STI,
                                           MCInst const &I) {
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h
index 66e84e115eba..f0c4a86fde78 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h
@@ -315,6 +315,10 @@ bool mustNotExtend(MCExpr const &Expr);
 // Returns true if this instruction requires a slot to execute.
 bool requiresSlot(MCSubtargetInfo const &STI, MCInst const &MCI);
 
+
+// Returns true if \a MCB would require endloop padding.
+bool LoopNeedsPadding(MCInst const &MCB);
+
 unsigned packetSize(StringRef CPU);
 
 // Returns the maximum number of slots available in the given